whitequark
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1890b0cbb0
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conda: also add build number, not just string.
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2015-10-22 12:43:14 +03:00 |
Sebastien Bourdeauducq
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2b80c9cc3d
|
Merge branch 'new' of github.com:m-labs/migen into new
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2015-10-22 17:15:26 +08:00 |
|
Sebastien Bourdeauducq
|
db62efc9c8
|
fhdl/namer: fix object aliasing bug
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2015-10-22 17:14:51 +08:00 |
|
whitequark
|
ecd04cf68c
|
travis: upload noarch conda package correctly.
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2015-10-21 20:26:19 +03:00 |
|
whitequark
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5dc26ea490
|
travis: install the package that was just built.
Otherwise, conda will select a newer remote version if available,
even with --use-local.
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2015-10-21 20:26:19 +03:00 |
|
whitequark
|
d718d1bca3
|
conda: build migen as noarch.
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2015-10-21 20:26:19 +03:00 |
|
whitequark
|
11d072bec9
|
conda: include hash in commit.
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2015-10-21 20:26:03 +03:00 |
|
Sebastien Bourdeauducq
|
2bbcc218f3
|
sim: fix case break
|
2015-10-20 17:18:33 +08:00 |
|
Sebastien Bourdeauducq
|
60ae9dce0d
|
sim: do not use py35 collections.Generator
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2015-10-20 16:37:54 +08:00 |
|
Sebastien Bourdeauducq
|
02e2366015
|
travis: workaround for conda noarch bug
|
2015-10-19 23:02:37 +08:00 |
|
Sebastien Bourdeauducq
|
5d75eb5e6a
|
conda: noarch
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2015-10-19 22:54:30 +08:00 |
|
Sebastien Bourdeauducq
|
ac5271e80e
|
sim: truncate case test value
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2015-10-19 20:08:46 +08:00 |
|
Sebastien Bourdeauducq
|
ee283575d8
|
test: fix divider testbench
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2015-10-19 19:41:18 +08:00 |
|
Sebastien Bourdeauducq
|
1f89900b16
|
sim: generators are also iterables...
|
2015-10-19 19:21:20 +08:00 |
|
Sebastien Bourdeauducq
|
02d804feab
|
sim: accept iterables as generator list
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2015-10-19 19:18:17 +08:00 |
|
Sebastien Bourdeauducq
|
0999a17319
|
verilog, sim: accept iterables in FHDL statements
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2015-10-19 19:17:26 +08:00 |
|
Sebastien Bourdeauducq
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4d9b2fff63
|
genlib/fsm: fix return value of _get_register_control
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2015-10-19 19:03:43 +08:00 |
|
Sebastien Bourdeauducq
|
a824046bbc
|
Revert "sim/core: fix Cat bitshift"
This reverts commit 6d6f91a02b.
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2015-10-19 16:08:42 +08:00 |
|
Sebastien Bourdeauducq
|
6d6f91a02b
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sim/core: fix Cat bitshift
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2015-10-19 16:07:45 +08:00 |
|
Sebastien Bourdeauducq
|
28962ff438
|
sim/core: truncate evaluated values before test in If
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2015-10-19 15:58:21 +08:00 |
|
Sebastien Bourdeauducq
|
ec80f0fa7e
|
build/vivado: quote paths in Tcl (prevents problems with \ on Windows)
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2015-10-19 09:40:44 +08:00 |
|
Sebastien Bourdeauducq
|
4acb7bc662
|
sim: support execution of nested statement lists (typo)
|
2015-10-15 13:53:04 +08:00 |
|
Sebastien Bourdeauducq
|
3b7f1264f1
|
sim: support execution of nested statement lists
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2015-10-15 13:52:24 +08:00 |
|
Sebastien Bourdeauducq
|
48d22a7588
|
genlib/fifo: width_or_layout -> width
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2015-10-14 21:36:44 +08:00 |
|
Sebastien Bourdeauducq
|
8817716d5f
|
test/divider: subtests
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2015-10-13 18:39:41 +08:00 |
|
Sebastien Bourdeauducq
|
e0899c1424
|
sim: make sure replaced memory signals are always in VCD signal set
|
2015-10-05 12:24:32 +08:00 |
|
Sebastien Bourdeauducq
|
70e3280579
|
travis/conda: build for python 3.5
|
2015-10-05 00:25:25 +08:00 |
|
Sebastien Bourdeauducq
|
b1f8aa2a67
|
travis: activate py35
|
2015-10-04 23:12:07 +08:00 |
|
Sebastien Bourdeauducq
|
6258257573
|
travis: python 3.5
|
2015-10-04 23:08:29 +08:00 |
|
Sebastien Bourdeauducq
|
6c01f80fc5
|
genlib/fifo: add missing imports
|
2015-09-30 18:58:46 +08:00 |
|
Sebastien Bourdeauducq
|
0c1e1c9769
|
test/fifo: do not use Record
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2015-09-30 17:06:31 +08:00 |
|
Sebastien Bourdeauducq
|
4451bb20e5
|
genlib/fifo: remove Record support
|
2015-09-30 16:39:33 +08:00 |
|
Sebastien Bourdeauducq
|
913558ab19
|
build: stop at the first failed Quartus command
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2015-09-29 15:53:18 +08:00 |
|
Sebastien Bourdeauducq
|
5e45b6ced6
|
build: add missing import for Lattice Diamond
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2015-09-29 15:44:57 +08:00 |
|
Sebastien Bourdeauducq
|
6d2d70d879
|
fhdl/FullMemoryWE: fix clocking
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2015-09-29 13:12:27 +08:00 |
|
Sebastien Bourdeauducq
|
b4c5ffc1ba
|
fhdl: typecheck ClockSignal and ResetSignal arguments
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2015-09-29 13:11:40 +08:00 |
|
Sebastien Bourdeauducq
|
7c9a7ee757
|
build: cleanup
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2015-09-28 20:34:35 +08:00 |
|
Sebastien Bourdeauducq
|
09003a55e1
|
fhdl/specials/Tristate: handle i=None
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2015-09-26 21:49:12 +08:00 |
|
Sebastien Bourdeauducq
|
e136352e8f
|
fhdl/structure: relax type requirements for Array elements
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2015-09-26 21:47:33 +08:00 |
|
Sebastien Bourdeauducq
|
808cf06add
|
fhdl: replace flen with len
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2015-09-26 18:45:10 +08:00 |
|
Sebastien Bourdeauducq
|
fa1e8cd822
|
wrap expressions in Specials
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2015-09-26 16:45:13 +08:00 |
|
Sebastien Bourdeauducq
|
8f42b6f352
|
fhdl: introduce wrap function
|
2015-09-26 15:36:28 +08:00 |
|
Sebastien Bourdeauducq
|
67903494bf
|
fhdl: export DUID
|
2015-09-26 13:46:57 +08:00 |
|
Sebastien Bourdeauducq
|
af88a7a3f9
|
setup: simpler version check, beta status
|
2015-09-24 16:08:39 +08:00 |
|
Sebastien Bourdeauducq
|
33f344b92a
|
fsm: NextState and NextValue should derive from _Statement
|
2015-09-23 22:38:10 +08:00 |
|
Sebastien Bourdeauducq
|
8935ca2c9f
|
setup: remove unneeded import
|
2015-09-23 09:52:24 +08:00 |
|
Sebastien Bourdeauducq
|
8421549935
|
README.md->rst
|
2015-09-23 00:55:37 +08:00 |
|
Sebastien Bourdeauducq
|
8534562185
|
sim: fix slice assign
|
2015-09-22 20:33:44 +08:00 |
|
Sebastien Bourdeauducq
|
88f9d72e74
|
conda: use new branch (revert this after merge)
|
2015-09-22 17:27:44 +08:00 |
|
Sebastien Bourdeauducq
|
6005548df6
|
setup.py: cleanup
|
2015-09-22 17:27:27 +08:00 |