Sebastien Bourdeauducq
|
3b3e2f19eb
|
Merge branch 'master' of github.com:milkymist/migen
|
2012-09-11 00:09:11 +02:00 |
|
Sebastien Bourdeauducq
|
5931c5eb59
|
Basic support for new clock domain and instance API
|
2012-09-10 23:47:06 +02:00 |
|
Sebastien Bourdeauducq
|
fc3187317b
|
examples: demonstrate multi-clock support
|
2012-09-10 23:46:19 +02:00 |
|
Sebastien Bourdeauducq
|
f7b1e67d08
|
examples: update LM32 instance
|
2012-09-10 23:45:27 +02:00 |
|
Sebastien Bourdeauducq
|
e16353a281
|
Multi-clock design support + new instance API
|
2012-09-10 23:45:02 +02:00 |
Florent Kermarrec
|
4a59b63151
|
Clean up
|
2012-09-09 23:46:26 +02:00 |
|
Florent Kermarrec
|
7a24ee7027
|
Wip de0_nano example
|
2012-09-09 23:27:51 +02:00 |
|
Florent Kermarrec
|
6b8dda03c6
|
Wip de0_nano example
|
2012-09-09 22:32:09 +02:00 |
|
Florent Kermarrec
|
1578c74895
|
Initialize de0_nano example
|
2012-09-09 21:18:09 +02:00 |
|
Florent Kermarrec
|
b8eaf0906a
|
Clean up
|
2012-09-09 20:51:15 +02:00 |
|
Florent Kermarrec
|
2092c5a138
|
add global tb, fix bugs
|
2012-09-09 20:38:01 +02:00 |
|
Sebastien Bourdeauducq
|
f40ca52e5f
|
setup.py: cosmetic
|
2012-09-09 19:56:04 +02:00 |
|
Sébastien Bourdeauducq
|
6490785b6c
|
Merge pull request #3 from brandonhamilton/upstream
Optionally accept iverilog simulator options
|
2012-09-09 10:52:52 -07:00 |
|
Sebastien Bourdeauducq
|
2a7d2908d1
|
examples: new namer
|
2012-09-09 19:34:46 +02:00 |
|
Sebastien Bourdeauducq
|
b45c9546eb
|
fhdl/namer: better handling of indices
|
2012-09-09 19:33:55 +02:00 |
|
Sebastien Bourdeauducq
|
589251fffd
|
fhdl/tracer: support BUILD_LIST opcode
|
2012-09-09 18:53:24 +02:00 |
|
Sebastien Bourdeauducq
|
910c350021
|
fhdl/namer: use execution order indices for variable names as well
|
2012-09-09 17:31:35 +02:00 |
|
Florent Kermarrec
|
289d35b952
|
simplify registers mgnt
|
2012-09-09 14:37:55 +02:00 |
|
Sebastien Bourdeauducq
|
f3e3a3eec7
|
fhdl/namer: number objects according to execution order
|
2012-09-09 12:27:32 +02:00 |
|
Sebastien Bourdeauducq
|
51f9a2a963
|
fhdl/namer: simplify + more relevant names
|
2012-09-09 01:26:33 +02:00 |
|
Florent Kermarrec
|
2abd7f664d
|
add tb_RecorderCsr.py
fixs in recorder.py
|
2012-08-27 00:44:26 +02:00 |
|
Florent Kermarrec
|
d34c877401
|
split migScope to trigger & recorder
|
2012-08-26 21:30:23 +02:00 |
|
Sebastien Bourdeauducq
|
4164fb4ac9
|
bus/csr: configurable data width
|
2012-08-26 21:19:34 +02:00 |
|
Florent Kermarrec
|
a99a902fef
|
add vcd generator
|
2012-08-26 20:56:56 +02:00 |
|
Florent Kermarrec
|
97cca81e0c
|
tb_TriggerCsr.py : use truth table generator for Sum Lut
|
2012-08-26 15:44:43 +02:00 |
|
Florent Kermarrec
|
68750445cd
|
add truth table generator
|
2012-08-26 15:15:44 +02:00 |
|
Florent Kermarrec
|
bf7864104a
|
tb_spi2Csr: Add clk_ratio
tb_spi2Csr: Add Read
spi2Csr : fixs
|
2012-08-26 13:03:11 +02:00 |
|
Florent Kermarrec
|
2e54001fc1
|
- fix Spi2Csr mistakes
|
2012-08-25 23:29:23 +02:00 |
|
Florent Kermarrec
|
b5a44f2e98
|
add sim: tb_Spi2Csr.py (skeleton, WIP)
|
2012-08-25 21:53:06 +02:00 |
|
Florent Kermarrec
|
d14ffb9146
|
add sim: tb_TriggerCsr.py
|
2012-08-25 18:46:58 +02:00 |
|
Florent Kermarrec
|
a7d85af25b
|
use ram for Sum
|
2012-08-24 00:16:00 +02:00 |
|
Florent Kermarrec
|
f4cac2c102
|
Add simulation skeleton
Remove SRLC16E, will be replaced by distributed ram
|
2012-08-22 23:59:00 +02:00 |
|
Florent Kermarrec
|
7dd51b3d92
|
new library spi2Csr (skeleton)
|
2012-08-13 01:02:38 +02:00 |
|
Florent Kermarrec
|
f586b13d4b
|
add register interface to Trigger
|
2012-08-12 21:17:17 +02:00 |
|
Florent Kermarrec
|
051e8ac570
|
simplify EdgeDetector
|
2012-08-12 19:42:25 +02:00 |
|
Florent Kermarrec
|
09bcfb0fa5
|
fix masks on EdgeDetector
|
2012-08-12 19:39:26 +02:00 |
|
Florent Kermarrec
|
68c451148a
|
add Trigger
|
2012-08-12 19:30:27 +02:00 |
|
Sebastien Bourdeauducq
|
9aa5ceb6d9
|
doc: ASMI reader
|
2012-08-12 18:04:29 +02:00 |
|
Sebastien Bourdeauducq
|
dc241639fd
|
doc: IntSequence
|
2012-08-12 17:55:29 +02:00 |
|
Florent Kermarrec
|
449466d5b7
|
rename Recorder --> Storage
add Recorder
|
2012-08-12 17:31:15 +02:00 |
|
Florent Kermarrec
|
18452c8193
|
add simple Sequencer
|
2012-08-12 16:04:52 +02:00 |
|
Florent Kermarrec
|
d22101eaa1
|
add Readme
|
2012-08-12 14:41:17 +02:00 |
|
Florent Kermarrec
|
db2d3418c3
|
add Readme
|
2012-08-12 14:38:49 +02:00 |
|
Florent Kermarrec
|
dbb363f039
|
- init Repo
|
2012-08-12 14:21:30 +02:00 |
|
Sebastien Bourdeauducq
|
dad4a91793
|
doc: framebuffer example
|
2012-08-08 17:30:18 +02:00 |
|
Sebastien Bourdeauducq
|
166e03d5f0
|
doc: arrays
|
2012-08-06 19:12:33 +02:00 |
|
Sebastien Bourdeauducq
|
42d5e850fe
|
framebuffer: disable debugger by default
|
2012-08-05 01:11:37 +02:00 |
|
Sebastien Bourdeauducq
|
5bf19c155f
|
sim: ensure clean IPC shutdown
|
2012-08-05 00:16:11 +02:00 |
|
Sebastien Bourdeauducq
|
47c341ecdf
|
flow/isd: add freeze register
|
2012-08-04 23:39:52 +02:00 |
|
Sebastien Bourdeauducq
|
5ef8d5f534
|
bios/dataflow: use freeze register
|
2012-08-04 23:39:29 +02:00 |