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5942 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq bfd2bf4ed3 tools: remove bin2hex 2012-02-08 15:08:03 +01:00
Sebastien Bourdeauducq 755079d7fa libbase: blocking UART write if IRQs are enabled 2012-02-07 15:12:27 +01:00
Sebastien Bourdeauducq 73fce59631 software: shell from original BIOS 2012-02-07 15:02:44 +01:00
Sebastien Bourdeauducq ef0667d959 software: UART RX demo 2012-02-07 14:12:33 +01:00
Sebastien Bourdeauducq 506ffab11a uart: RX support 2012-02-07 14:12:23 +01:00
Sebastien Bourdeauducq fb22edc06a software: enable -Wmissing-prototypes 2012-02-07 13:02:06 +01:00
Sebastien Bourdeauducq 63f6dece56 software: use the Clang/LLVM compiler 2012-02-07 12:52:34 +01:00
Sebastien Bourdeauducq a40b0ea175 software: fix size_t and ptrdiff_t 2012-02-07 12:06:49 +01:00
Sebastien Bourdeauducq 494c383fa8 software: remove unnecessary IRQ acks 2012-02-07 00:07:25 +01:00
Sebastien Bourdeauducq b6b1901bb8 LM32: make IP read-only and interrupt lines level-sensitive 2012-02-07 00:07:12 +01:00
Sebastien Bourdeauducq 4aaf48afb0 software: interrupt driven UART working 2012-02-06 23:53:29 +01:00
Sebastien Bourdeauducq 58f4f78d2c sram: fix sub-word write 2012-02-06 23:13:35 +01:00
Sebastien Bourdeauducq 47883675db bus/wishbone2csr: truncate WB data 2012-02-06 18:43:34 +01:00
Sebastien Bourdeauducq 1eb348c573 fhdl: do not attempt slicing non-array signals to keep Verilog happy 2012-02-06 18:07:02 +01:00
Sebastien Bourdeauducq 5cde57cb65 software: use new UART 2012-02-06 17:53:41 +01:00
Sebastien Bourdeauducq 33f1c456bf top: connect UART IRQ 2012-02-06 17:45:40 +01:00
Sebastien Bourdeauducq 5dc875de69 UART: use new bank API and event manager 2012-02-06 17:45:31 +01:00
Sebastien Bourdeauducq fcd6583cbb bank: event manager 2012-02-06 17:39:32 +01:00
Sebastien Bourdeauducq 3a2a0c4dd8 bank: support registers larger than the bus word width 2012-02-06 16:15:27 +01:00
Sebastien Bourdeauducq f3ddfffc47 bank: refactoring 2012-02-06 13:55:50 +01:00
Sebastien Bourdeauducq 1a86f26a66 bank/csrgen: use enumerate 2012-02-06 11:18:30 +01:00
Sebastien Bourdeauducq 45529d5941 BIOS: hello world 2012-02-05 20:01:28 +01:00
Sebastien Bourdeauducq 33da32417a Update gitignore 2012-02-05 20:01:14 +01:00
Sebastien Bourdeauducq 9b9a510525 Memory map 2012-02-05 19:54:08 +01:00
Sebastien Bourdeauducq 629e771fc0 fhdl/structure: binary constant builder 2012-02-05 19:32:11 +01:00
Sebastien Bourdeauducq 17cd8dd479 Add tools 2012-02-05 19:14:24 +01:00
Sebastien Bourdeauducq e2317bc83b flash: remove splash screens 2012-02-05 19:12:33 +01:00
Sebastien Bourdeauducq 1ad44b6571 software: dependencies the Werner way 2012-02-03 12:25:55 +01:00
Sebastien Bourdeauducq 1a4a6eb445 Copy some software code from the original Milkymist SoC. 
Libbase should keep its RAM usage to a minimum as it is meant to
be executed before the SDRAM is up and running. (Having lots of
code is OK though as we XIP from the flash)
 2012-02-03 12:08:17 +01:00
Sebastien Bourdeauducq b5cb1083ab sram: fix WE signal 2012-02-03 10:38:17 +01:00
Sébastien Bourdeauducq 504a169afb Merge pull request #2 from larsclausen/master 
migen patches
 2012-02-03 01:25:38 -08:00
Lars-Peter Clausen 8380318e84 Use enumerate(x) instead of zip(range(x), x) 
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2012-02-02 21:28:00 +01:00
Lars-Peter Clausen 2b3f00cbc1 fhdl/namer: Add support for STORE_DEREF opcode 
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2012-02-02 21:15:10 +01:00
Lars-Peter Clausen 9f05e7235d Lower required python version to 3.1 
migen is confirmed to work fine with python 3.1, so lower the required version
from 3.2 to 3.1.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2012-02-02 21:15:07 +01:00
Sebastien Bourdeauducq 3143608e0a examples/wb_intercon: update to new APIs 2012-01-28 23:18:21 +01:00
Sebastien Bourdeauducq 6a9b59786b fhdl/namer: extract variable names with bytecode inspection 2012-01-28 23:17:44 +01:00
Sebastien Bourdeauducq 5c2df45577 fhdl: do not prefix instance signal names 2012-01-28 11:39:28 +01:00
Sebastien Bourdeauducq 8a2646a549 Remove explicit bus names 2012-01-27 22:21:08 +01:00
Sebastien Bourdeauducq a99c2acfa8 Remove explicit bus names and rely on the new automatic namer 2012-01-27 22:20:57 +01:00
Sebastien Bourdeauducq 28f00c3a9a Add on-chip SRAM 2012-01-27 22:09:03 +01:00
Sebastien Bourdeauducq 685b5eb08f fhdl: support memory read enable 2012-01-27 21:39:23 +01:00
Sebastien Bourdeauducq 0cc7e2ac1e fhdl: make WRITE_FIRST default 2012-01-27 21:35:58 +01:00
Sebastien Bourdeauducq 2726ba2242 doc: memories 2012-01-27 21:23:17 +01:00
Sebastien Bourdeauducq 5405a83ff9 fhdl: memories working 2012-01-27 20:22:17 +01:00
Sebastien Bourdeauducq a5bd111370 fhdl/verilog: clean up signal classification and support memory descriptions 2012-01-27 16:54:48 +01:00
Sebastien Bourdeauducq 6b1d775e9f fhdl/structure: memory description 2012-01-27 16:53:34 +01:00
Sebastien Bourdeauducq 5466a82933 doc: cosmetic changes 2012-01-27 14:35:58 +01:00
Sebastien Bourdeauducq bf2f6f31e3 doc: ASMI description 2012-01-26 18:01:17 +01:00
Sebastien Bourdeauducq 21f3def74b Remove duplicate logo 2012-01-25 20:10:11 +01:00
Sebastien Bourdeauducq 009ebd1106 doc: refactor 2012-01-25 20:01:45 +01:00