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59 Commits

Author SHA1 Message Date
Florent Kermarrec 2bd38f44a3 liteeth: more pep8 (when convenient), should be almost OK 2015-04-13 13:02:04 +02:00
Florent Kermarrec 154d3d3b04 liteeth: pep8 (E265) 2015-04-13 11:27:01 +02:00
Florent Kermarrec 45dc4920ec liteeth: pep8 (E261, E271) 2015-04-13 11:07:50 +02:00
Florent Kermarrec 021a5ae8a0 liteeth: pep8 (W292) 2015-04-13 10:58:45 +02:00
Florent Kermarrec a84f12618b liteeth: pep8 (E225) 2015-04-13 10:56:18 +02:00
Florent Kermarrec 66ce40d880 liteeth: pep8 (E222) 2015-04-13 10:48:59 +02:00
Florent Kermarrec ff2d7f9adc liteeth: pep8 (E401) 2015-04-13 10:45:09 +02:00
Florent Kermarrec 726fd3ab42 liteeth: pep8 (E203) 2015-04-13 10:39:46 +02:00
Florent Kermarrec 8dc817dd70 liteeth: pep8 (E231) 2015-04-13 10:31:18 +02:00
Florent Kermarrec 9c527742cb liteeth: pep8 (E201) 2015-04-13 10:23:33 +02:00
Florent Kermarrec 5720638d85 liteeth: pep8 (E302) 2015-04-13 10:20:02 +02:00
Florent Kermarrec cd43eaffc2 liteeth: pep8 (replace tabs with spaces) 2015-04-13 09:53:43 +02:00
Florent Kermarrec afa9b889ae liteeth/phy/gmii: fix clock generation for mii mode (clock_pads.tx is an input) 2015-04-12 22:15:45 +02:00
Florent Kermarrec 8e639160e3 liteeth/phy/gmii_mii: add pads registers in RX 2015-04-12 20:43:01 +02:00
Florent Kermarrec 0c27708b0a liteeth/phy/gmii_mii: avoid doubling pads register on TX 2015-04-12 20:42:12 +02:00
Florent Kermarrec bc81d9d639 liteeth/phy/__init__.py: add more comments 2015-04-12 18:56:46 +02:00
Florent Kermarrec 515398634f liteeth/phy/gmii_mii: add clock counter and use it in bios to select mode 2015-04-12 18:42:52 +02:00
Florent Kermarrec 857bee8a00 liteeth/phy: add GMII/MII phy 
for now swicth is manual, we will need a clk counter to allow software or logic to automatically switch between GMII and MII
 2015-04-12 17:25:55 +02:00
Florent Kermarrec cfac3d9f5c liteeth/phy/mii: simplify LiteEthPHYMIIRX using Converter 2015-04-12 16:03:21 +02:00
Florent Kermarrec ddae41f2e4 liteeth/phy/mii: simplify LiteEthPHYMIITX using Converter 2015-04-12 15:34:56 +02:00
Florent Kermarrec 8c722db54e liteeth/phy/mii: assign tx_er only if exists (as it's done on GMII) 2015-04-12 14:43:35 +02:00
Florent Kermarrec 4329e3e1b9 liteeth/phy/mii: allow use of MII phy on GMII/MII chips that do not have phy clock provided by the FPGA (tested on KC705) 2015-04-12 14:28:17 +02:00
Sebastien Bourdeauducq 603a4ef51e liteeth: adapt to new ModuleTransformer 2015-04-10 11:42:25 +08:00
Florent Kermarrec 03aa972bb6 lite*: finish ModuleTransformer adaptations (need to be tested on board) 2015-04-08 23:27:22 +02:00
Robert Jordens 66f8dcbfaf lite*: adapt to new ModuleTransformer semantics 
NOTE: There is loads of duplicated code between the lite*
modules that should be shared.
 2015-04-04 19:17:24 +08:00
Florent Kermarrec dcdf5df4de adapt LiteEth to new SoC 2015-04-01 22:50:29 +02:00
Florent Kermarrec 9107710f03 litexxx cores: use default baudrate of 115200 for all tests 2015-03-20 12:22:53 +01:00
Florent Kermarrec 84b631c929 liteeth/mac/core: add with_padding option (enabled by default) and change with_hw_preamble_crc option to with_preamble_crc 2015-03-19 14:52:02 +01:00
Florent Kermarrec 6bdf60567c liteeth/mac/core: fix hw_preamble_crc register generation 2015-03-19 13:03:27 +01:00
Florent Kermarrec 236ea0f572 liteeth: use bios ip_address in example designs 2015-03-18 18:18:43 +01:00
Florent Kermarrec a266deb58e LiteXXX cores: fix frequency print in test/test_regs.py 2015-03-17 16:01:25 +01:00
Florent Kermarrec d2cb41bc63 LiteXXX cores: convert port parameter to int if is digit in test/make.py 2015-03-17 15:58:21 +01:00
Florent Kermarrec 2327710387 liteeth/phy/gmii : set tx_er to 0 only if it exits 2015-03-17 12:24:06 +01:00
Florent Kermarrec 408d0fd2dd liteeth: use default programmer in make.py 2015-03-17 12:12:21 +01:00
Florent Kermarrec ec6ae75065 liteeth: use CRG from Migen in base example 2015-03-17 12:11:51 +01:00
Florent Kermarrec faf185d58d liteeth: make gmii phy generic 2015-03-16 23:04:37 +01:00
Florent Kermarrec c3c7f627d9 liteeth/phy: typo (thanks sb) 2015-03-12 21:54:10 +01:00
Florent Kermarrec 767d45727a uart/liteeth: only import the phy we are going to use (UARTPHYSim cannot be imported on Windows since based on pty). 2015-03-12 16:57:38 +01:00
Florent Kermarrec 6cbf13036b liteeth/mac: fix padding limit (+1), netboot OK with sim platform 2015-03-09 20:59:34 +01:00
Florent Kermarrec 47cceea222 liteeth/mac: use Counter in sram and move some logic outside of fsms 2015-03-09 20:22:14 +01:00
Florent Kermarrec b10836a8eb liteeth/phy/sim: create ethernet tap in __init__ and destroy it in do_exit 2015-03-09 17:21:29 +01:00
Florent Kermarrec 360c849f21 liteeth: fix cnt_inc in IDLE state (we should wait sop to inc counter) 2015-03-09 13:23:39 +01:00
Florent Kermarrec 5dbd8af4be liteeth: do not insert CRC/Preamble in simulation to allow direct connection to ethernet tap 2015-03-09 13:23:37 +01:00
Florent Kermarrec 95fa753149 liteeth: add phy autodetect function (phy can still be instanciated directly) 2015-03-06 10:10:34 +01:00
Florent Kermarrec 52f1c45407 LiteXXX cores: fix test_reg.py 2015-03-04 23:13:14 +01:00
Florent Kermarrec 1d4dc45436 LiteXXX cores: use format in prints 2015-03-03 10:29:28 +01:00
Florent Kermarrec 649cdeb265 liteXXX cores: use new uart and import FlipFlop/Counter/Timeout from Migen 2015-03-01 16:48:41 +01:00
Florent Kermarrec c21a7956c8 liteXXX cores: remove Identifier duplication 2015-03-01 11:24:58 +01:00
Florent Kermarrec 67ca0da1d9 liteXXX cores: share same methodology for on-board tests 2015-03-01 11:21:12 +01:00
Florent Kermarrec b32a0e6f9e liteeth: create example design derived from SoC that can be used on all targets with Ethernet pins 2015-02-28 23:33:00 +01:00