Commit Graph

123 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 6c01f80fc5 genlib/fifo: add missing imports 2015-09-30 18:58:46 +08:00
Sebastien Bourdeauducq 4451bb20e5 genlib/fifo: remove Record support 2015-09-30 16:39:33 +08:00
Sebastien Bourdeauducq 808cf06add fhdl: replace flen with len 2015-09-26 18:45:10 +08:00
Sebastien Bourdeauducq fa1e8cd822 wrap expressions in Specials 2015-09-26 16:45:13 +08:00
Sebastien Bourdeauducq 33f344b92a fsm: NextState and NextValue should derive from _Statement 2015-09-23 22:38:10 +08:00
Sebastien Bourdeauducq 31ffa8c18f fsm: support complex targets in NextValue. Closes #27. 2015-09-22 16:55:24 +08:00
Sebastien Bourdeauducq dcf4f7fef3 genlib/fifo: add missing import 2015-09-19 23:20:19 +08:00
Florent Kermarrec 563231fdfb migen/genlib/cdc: fix BusSynchronizer
ping/pong token can be lost when:
- source clock domain starts before destination clock domain.
- a clock domain stops.

This fix add a timeout to detect such situation and create another token.
2015-09-19 12:21:54 +08:00
Sebastien Bourdeauducq 84f98b4632 genlib/CRG: fix variable name conflict 2015-09-19 11:18:44 +08:00
Sebastien Bourdeauducq 12cd390c0b genlib/misc: add missing import 2015-09-17 17:22:44 +08:00
Sebastien Bourdeauducq eb921fb957 genlib: remove reverse_bytes, FlipFlop, Counter 2015-09-12 19:40:29 +08:00
Sebastien Bourdeauducq 9667d61e84 genlib: cleanup CRG 2015-09-12 19:40:07 +08:00
Sebastien Bourdeauducq 336728413a simplify imports, migen.fhdl.std -> migen 2015-09-12 19:34:07 +08:00
Sebastien Bourdeauducq 9556c335ea genlib/sort: remove unneeded import 2015-09-12 15:21:42 +08:00
Sebastien Bourdeauducq 91ab3f0d01 remove genlib.misc.optree (use reduce instead) 2015-09-10 13:56:56 -07:00
Sebastien Bourdeauducq dec2e23fc7 Remove code that will be into MiSoC or other packages. 2015-09-05 15:06:04 -06:00
Florent Kermarrec 79624ce849 migen/genlib/fsm: fix delayed_enter when delay is negative (can happen when delay is generated from others parameters) 2015-06-02 19:26:42 +02:00
Sebastien Bourdeauducq fd16b66bdf genlib/cdc: add BusSynchronizer 2015-06-02 17:40:42 +08:00
Florent Kermarrec 9cabcf14e9 migen/genlib/record: add leave_out parameter to connect
Modules doing dataflow adaptation often need to connect most of the signals between endpoints except the one concerned by the adaptation.
This new parameter ease that by avoid manual connection of all signals.
2015-05-23 13:59:09 +02:00
Florent Kermarrec 88a406ebec migen/genlib/misc: replace Timeout with WaitTimer from artiq 2015-05-12 16:14:58 +02:00
Florent Kermarrec 0da9311d70 migen/genlib: avoid use of floating point in reverse_bytes 2015-04-27 21:04:18 +02:00
Florent Kermarrec e96ba1e46f migen/genlib/misc: add reverse_bytes 2015-04-27 15:08:10 +02:00
Florent Kermarrec f97d7ff44c global: pep8 (E261, E271) 2015-04-13 21:21:30 +02:00
Florent Kermarrec 37ef9b6f3a global: pep8 (E231) 2015-04-13 20:50:03 +02:00
Florent Kermarrec 1051878f4c global: pep8 (E302) 2015-04-13 20:45:35 +02:00
Florent Kermarrec 17e5249be0 global: pep8 (replace tabs with spaces) 2015-04-13 20:07:07 +02:00
Sebastien Bourdeauducq 90c5512b25 genlib: remove cordic (will live in pdq2) 2015-04-08 11:35:53 +08:00
Robert Jordens 25e4d2a2db decorators: remove deprecated semantics 2015-04-05 18:47:45 +08:00
Florent Kermarrec 2fc2f8a6c0 migen/genlib/io: use 0 instead of Signal() for default rst value (immutable thanks sb) 2015-03-18 14:41:43 +01:00
Florent Kermarrec 89fefef3f8 genlib/io: add optional external rst to CRG 2015-03-17 16:22:22 +01:00
Florent Kermarrec 69ce6dd48c migen/genlib/io: add DDRInput and DDROutput 2015-03-16 22:47:13 +01:00
Sebastien Bourdeauducq beeaefccea move pytholite to separate repos 2015-03-14 22:48:03 +01:00
Sebastien Bourdeauducq 6a979a8023 mibuild: sanitize default clock management 2015-03-14 00:10:08 +01:00
Florent Kermarrec ff266bc2ee migen/genlib/io: add DifferentialOutput and Xilinx implementation 2015-03-12 19:30:57 +01:00
Florent Kermarrec bf28664cb4 genlib/io.py: fix copy/paste error (thanks rjo) 2015-03-12 18:49:49 +01:00
Florent Kermarrec c8ba8cde8e migen/genlib: add io.py to define generic I/O specials to be lowered by mibuild 2015-03-12 18:38:53 +01:00
Florent Kermarrec 8e09a86e4f genlib/misc: add increment parameter to Counter 2015-03-09 20:20:25 +01:00
Sebastien Bourdeauducq 7b00141a0c genlib/cordic: fix typos 2015-03-06 00:47:23 +01:00
Florent Kermarrec 06f3c46e35 genlib/misc: fix missing *args in Counter 2015-03-04 23:49:15 +01:00
Florent Kermarrec 8f81ae6826 genlib/misc: add FlipFlop, Counter, Timeout 2015-03-01 16:33:46 +01:00
Florent Kermarrec c7eba8f4c4 remove crc since each crc is specific. It's probably better to adapt code for each case. 2015-02-14 03:01:12 -08:00
Florent Kermarrec 7471b2a152 genlib/crc: use OrderedDict 2015-01-23 00:23:41 +08:00
Florent Kermarrec 037ea05b1e crc: modify CRCChecker to remove CRC and clean up 2014-12-21 17:24:52 +08:00
Sebastien Bourdeauducq 4542de2c11 genlib/fsm: add NextValue to replace reg/reg_next/ce pattern 2014-11-25 17:16:21 +08:00
Guy Hutchison 9f2f8d279d add hamming-code gen/check lib 2014-11-06 18:19:59 -08:00
Florent Kermarrec fcf2f7517c crc: generate error asynchronously to avoid stalling the flow and simplify 2014-11-01 21:21:46 +08:00
Florent Kermarrec dbaeaf7833 remove trailing whitespaces 2014-10-17 17:08:46 +08:00
Sebastien Bourdeauducq 15f67b30d0 genlib/fsm: make first fsm.act() the reset state, even when using after_*/before_* methods before fsm.act 2014-09-29 19:38:58 +08:00
Florent Kermarrec e03091e7e2 add generic CRCEngine, CRC32, CRCInserter and CRCChecker
CRCEngine implements a generic and optimized CRC LFSR. It will enable generation of CRC generators and checkers.
CRC32 is an implementation of IEEE 802.3 CRC using the CRCEngine.
CRC32Inserter and CRC32Checker have been tested on an ethernet MAC.
2014-09-26 11:42:10 +08:00
Sebastien Bourdeauducq 6c9810532b genlib/fifo/SyncFIFOBuffered: replace not supported 2014-09-17 19:59:13 +08:00