20003f0ada
software: go back to GCC
2013-02-16 23:41:42 +01:00
c56c916129
load.jtag: remove CFG_OUT/CFG_IN instructions
2013-02-15 19:39:54 +01:00
7ad2f7081b
m1crg: fix signal names
2013-02-13 23:59:35 +01:00
5649e88a90
Use Mibuild
2013-02-11 18:23:06 +01:00
f68fcef90c
tb: use default runner
2013-02-09 17:09:29 +01:00
a94ee3884f
software/include: add float.h
2013-01-12 10:57:43 +01:00
83f562a76c
software/include: add stdbool.h
2013-01-12 10:51:07 +01:00
080dbaa206
software: hide and delete .ts files
2013-01-10 18:01:42 +01:00
7adee988f2
software: compile compiler-rt ourselves
2013-01-10 17:59:00 +01:00
d576893bda
software/include/base/stdint.h: add INT32_C
2013-01-10 17:58:17 +01:00
c5c29199be
software: run the assembler ourselves to prevent future time wastage due to breakage of our custom Clang toolchain
2013-01-10 17:20:31 +01:00
c490917aec
software/common.mak: remove -fsigned-char from CFLAGS
2013-01-10 17:14:51 +01:00
e4144f2c7d
software/common.mak: use -target instead of deprecated -ccc-host-triple
2013-01-10 17:13:33 +01:00
b0503aaf85
software/include/base/stdint.h: more definitions
2013-01-10 17:10:29 +01:00
51f4f920a2
Do not use super()
2012-12-18 14:55:58 +01:00
c44ff8941c
Move Token
2012-12-14 15:54:16 +01:00
3986790621
Remove ActorNode
2012-12-12 22:52:55 +01:00
053f8ed82c
Fix instantiations
2012-12-06 20:57:00 +01:00
0392dd8ac2
bank/csrgen: interface -> bus
2012-12-06 17:15:47 +01:00
bec02c4783
Merge branch 'master' of github.com:milkymist/milkymist-ng
2012-12-01 12:59:47 +01:00
fee70e9866
Use Wishbone SRAM component from Migen
2012-12-01 12:59:32 +01:00
7a1e4cb66b
lm32: fix watchpoints
...
The wp_match_n vector is off by one. Which results in undefined states, at
least in simulation.
Signed-off-by: Michael Walle <michael@walle.cc>
2012-11-30 15:22:40 +01:00
293a62dabe
Replace Signal(bits_for(... with Signal(max=...
2012-11-29 23:41:51 +01:00
8bf6945dfd
Use new bitwidth/signedness system
2012-11-29 23:38:04 +01:00
7e2bc00c0a
Remove Constant
2012-11-28 23:18:53 +01:00
79e5f24a65
Workaround for zero-delay loop simulation problem with Icarus Verilog. TODO: clarify and revert this commit.
2012-11-28 22:49:22 +01:00
0620e75cb8
sram: do not use MemoryPort
2012-11-26 19:32:56 +01:00
0c29775a8f
tb/asmicon/asmicon_wb: more complete testing by default
2012-11-26 18:19:41 +01:00
5ae1b2644e
tb/asmicon: new initiator API
2012-11-17 19:43:30 +01:00
a0ff666628
lm32: replace $clog2 with macro
...
Unfortunately, XST does not support $clog2 with the localparam keyword
(the parameter keyword works just fine). Define a macro which replaces the
call with a constant function.
This commit can be reverted if the bug in XST is fixed.
Signed-off-by: Michael Walle <michael@walle.cc>
2012-11-14 14:30:16 +01:00
d15d982904
lm32: split lm32_include.v
2012-11-14 14:25:15 +01:00
2ae17af75b
lm32: fix documentation style
...
Signed-off-by: Michael Walle <michael@walle.cc>
2012-11-14 14:09:21 +01:00
4bee685c54
lm32: remove unneeded parameter in lm32_dp_ram
...
addr_depth can be computed by addr_width.
Signed-off-by: Michael Walle <michael@walle.cc>
2012-11-14 14:08:41 +01:00
10495e72d0
lm32: rename mem array in lm32_dp_ram
...
Be compatible with original proprietary DP RAM instantiation. This is
needed for simulation, where r0 is initialized to zero in lm32_cpu.v.
Signed-off-by: Michael Walle <michael@walle.cc>
2012-11-14 14:08:06 +01:00
47baad4fe1
lm32: replace clogb2 by builtin $clog2
...
This function is fixed in ISE since version 14.1 (see AR #44586 ). If the
builtin function is used, the design can be simulated with Icarus Verilog.
Signed-off-by: Michael Walle <michael@walle.cc>
2012-11-14 14:07:28 +01:00
ced98d7bee
framebuffer: use new SingleGenerator
2012-10-09 21:11:26 +02:00
dd6eacba62
Remove uses of the RE signal on field registers
2012-10-09 19:08:37 +02:00
c86dd3cbef
Define clock domains instead of passing extra clocks as regular signals
2012-09-11 00:21:07 +02:00
5931c5eb59
Basic support for new clock domain and instance API
2012-09-10 23:47:06 +02:00
42d5e850fe
framebuffer: disable debugger by default
2012-08-05 01:11:37 +02:00
5ef8d5f534
bios/dataflow: use freeze register
2012-08-04 23:39:29 +02:00
a5d6ced181
asmicon: fix and simplify refresh grant logic
2012-08-04 22:59:21 +02:00
ea4c214790
asmicon/bankmachine: respect SDRAM write-to-precharge specification
2012-08-04 22:49:43 +02:00
1451cad710
asmicon/multiplexer: correct read-to-write delay to prevent conflicts on the tag bus
2012-08-04 17:38:42 +02:00
274a00217e
bios: asmiprobe command
...
Because with reordering architectures come order-dependent intermittent bugs.
2012-08-04 16:32:15 +02:00
855eec776d
Add ASMIprobe core
2012-08-04 16:31:24 +02:00
6807dba8bc
asmicon/bankmachine/selector: fix round-robin CE
2012-08-03 22:33:52 +02:00
df2b653c67
asmicon/bankmachine: do not insert buffer when using _SimpleSelector
2012-08-03 22:11:16 +02:00
6078a4e6d0
tb/selector: use _SimpleSelector
2012-08-03 22:10:04 +02:00
5bbdab1fd6
tb/asmicon: concurrent reads and writes
2012-08-03 22:09:23 +02:00
Sebastien Bourdeauducq
Michael Walle