Florent Kermarrec
e03091e7e2
add generic CRCEngine, CRC32, CRCInserter and CRCChecker
...
CRCEngine implements a generic and optimized CRC LFSR. It will enable generation of CRC generators and checkers.
CRC32 is an implementation of IEEE 802.3 CRC using the CRCEngine.
CRC32Inserter and CRC32Checker have been tested on an ethernet MAC.
2014-09-26 11:42:10 +08:00
Florent Kermarrec
a03570ccca
flow/actor: fix eop direction
2014-09-23 00:14:58 +08:00
Florent Kermarrec
66054af7bb
flow/actor: add packetized parameter for Sink and Source
2014-09-22 23:45:28 +08:00
Florent Kermarrec
967b73bef3
actorlib/structuring: add reverse parameter to Unpack and Pack
2014-09-22 23:41:40 +08:00
Sebastien Bourdeauducq
6c9810532b
genlib/fifo/SyncFIFOBuffered: replace not supported
2014-09-17 19:59:13 +08:00
Sebastien Bourdeauducq
4cacf97088
genlib/fifo: same 'level' semantics between SyncFIFOBuffered and FWFT SyncFIFO
2014-09-17 19:58:43 +08:00
Sebastien Bourdeauducq
264bc61e04
genlib/fifo: add replace command to sync FIFO
2014-09-10 21:19:15 +08:00
Sebastien Bourdeauducq
325ffdc6c6
actorlib/spi: remove unneeded import
2014-09-08 18:48:54 +08:00
Florent Kermarrec
c1e12c3346
actorlib/spi: remove EventManager from DMAController
2014-09-08 11:34:21 +08:00
Robert Jordens
0bac463780
sim/icarus: add vpi directory to module search path
...
This allows running the iverilog simulations from the migen top directory
without having to install the .vpi anywhere.
2014-09-07 16:49:12 +08:00
Robert Jordens
3d84a7a9de
cordic: round() constants if not power of two bitwidth, cleanup, simplify some logic
2014-09-07 16:49:12 +08:00
Robert Jordens
11f58862db
test_cordic: stop spewing out numbers
2014-09-07 16:49:12 +08:00
Robert Jordens
4def6ec391
flow/network: replace NetworkX MultiDiGraph with simple implementation
2014-09-07 16:48:46 +08:00
Robert Jordens
683643266f
cordic: vivado is bad at inferring compact adder/subtractor logic
2014-09-04 15:25:34 +08:00
Robert Jordens
bd232f3f61
fhdl.structure: do not permit clock domain names that start with numbers
2014-08-18 11:01:56 +08:00
Robert Jordens
ac2e961618
fhdl.structure: remove unused imports
2014-08-18 11:01:56 +08:00
Robert Jordens
6036fffef2
Signal.__getitem__: raise TypeError and IndexError when appropriate
2014-08-18 11:01:56 +08:00
Robert Jordens
b3d69913cd
Signal.like: pass kwargs
2014-08-18 11:01:56 +08:00
Sebastien Bourdeauducq
60706e4b70
bus/dfi: add CKE and RESET_N
2014-08-09 10:56:08 +08:00
Sebastien Bourdeauducq
b124a98d92
genlib: add reset synchronizer
2014-08-06 19:38:37 +08:00
Sebastien Bourdeauducq
8baa957539
genlib/fifo: use synchronous memory read instead of additional register
...
The latter causes problems with InsertReset
2014-08-02 08:52:49 +08:00
Robert Jordens
44c6e524ba
migen.fhdl.structure: add Signal.like(other)
...
This is a convenience method. Signal(flen(other)) is used frequently but that
drops the signedness. Signal((other.nbits, other.signed)) would be correct but
is long.
2014-07-24 23:52:59 -06:00
Florent Kermarrec
9fcea6e64a
migen/sim/generic: use kwargs to pass parameters to icarus.Runner
2014-07-24 10:17:54 -06:00
Robert Jordens
10d639d313
flow.plumbing: spelling
2014-07-19 14:29:51 -06:00
Robert Jordens
9266e10cae
flow.plumbing: make argument order consistent
2014-07-19 14:29:50 -06:00
Sebastien Bourdeauducq
ff1d105c7e
genlib/SyncFIFO: remove flush signal (use InsertReset instead)
2014-07-17 19:15:45 -06:00
Florent Kermarrec
ea0f4706f5
fsm: set reset_state as default state
2014-06-22 15:21:22 +02:00
Florent Kermarrec
4c426b36f3
fifo: add support for depth=2
2014-06-15 23:58:46 +02:00
Florent Kermarrec
70a2ee4368
migen/bank/description: add reset parameter to CSRStatus
2014-06-15 23:54:38 +02:00
Florent Kermarrec
9c1d95f6a4
wishbone2lasmi: fix wordbits computation
2014-05-01 13:32:18 +02:00
Sebastien Bourdeauducq
29ed3918cc
fhdl: forbid zero-length signals
2014-04-18 15:01:50 +02:00
Florent Kermarrec
86f852a5f1
wishbone2lasmi: support lasmim data_width < wishbone data_width
2014-04-18 15:00:53 +02:00
Sebastien Bourdeauducq
a36a208dd1
sim: use (mandatory) ncycles when starting a simulation with no active functions
2014-04-13 15:16:27 +02:00
Robert Jordens
ce378f47d3
test/SyncFIFOCase: better test bench termination
2014-04-07 00:05:08 +02:00
Robert Jordens
ac1363565d
genlib/fifo: add SyncFIFOClassic and SyncFIFOBuffered
2014-04-05 12:15:14 +02:00
Robert Jordens
9deddbdfbc
test/test_cordic: fix for new Simulation API
2014-03-24 15:01:44 -07:00
Robert Jordens
7649028bdc
test/support: fix default ncycles
2014-03-24 15:01:44 -07:00
Robert Jordens
0023b742e4
genlib/coding: gracefully handle flen(i) < 2
2014-03-19 18:12:27 -07:00
Robert Jordens
0836f2814a
bus/csr: new simulation api
2014-03-19 18:12:27 -07:00
Robert Jordens
b03d9f4c14
genlib/fifo: add flush, expose level in SyncFIFO
...
AsyncFIFO would need versions of flush and level in each clock domain
plus some handshaking on double flush.
Signed-off-by: Robert Jordens <jordens@gmail.com>
2014-03-15 23:10:46 -07:00
Sebastien Bourdeauducq
2ab939e69d
fix SimActor TB terminations
2014-01-28 00:03:56 +01:00
Sebastien Bourdeauducq
90f0dfad63
Add 'passive' simulation functions that are not taken into account while determining when to stop the simulator
2014-01-27 23:58:46 +01:00
Sebastien Bourdeauducq
63c1d7e4b7
New simulation API
2014-01-26 22:19:43 +01:00
Sebastien Bourdeauducq
8f69d9b669
bank/eventmanager: add SharedIRQ
2014-01-06 22:13:06 +01:00
Robert Jordens
be1c8551d2
migen/fhdl/tools: speed up group_by_targets (halves the mixxeo runtime)
2013-12-17 18:40:49 +01:00
Sebastien Bourdeauducq
a20688f777
fhdl/simplify/FullMemoryWE: fix WE slice for multi-port mems
2013-12-13 00:02:50 +01:00
Sebastien Bourdeauducq
adda930c68
fhdl/simplify: add FullMemoryWE decorator that splits memories to remove partial WEs
2013-12-12 17:37:31 +01:00
Sebastien Bourdeauducq
adffec35f6
utils/misc: add gcd_multiple function to compute GCD or any number of integers
2013-12-12 17:36:50 +01:00
Sebastien Bourdeauducq
c13fe1bc63
specials/Memory: allow for more flexibility in memory port signals
2013-12-12 17:36:17 +01:00
Sebastien Bourdeauducq
135a4fea25
fhdl/verilog: fix representation of negative integers
...
Give the explicit two's complement representation for the given bit width.
This results in less readable code compared to using unary minus,
but fixes a bug when trying to represent the most negative integer.
2013-12-11 22:26:10 +01:00
