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838 commits 42 branches 14 tags 31 MiB
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55 commits

Author SHA1 Message Date
Florent Kermarrec
07b9cabd0d gensoc: make it more generic (a SoC does not necessarily have a CPU) 2015-02-27 16:39:00 +01:00
Florent Kermarrec
367db268ad reserve csr_map 0-->16 for gensoc internal csrs 2015-02-27 14:18:13 +01:00
Florent Kermarrec
77a6f580e2 gensoc: add check_cpu_memory_region and check_csr_region to detect csr and mem regions conflicts 2015-02-27 10:23:02 +01:00
Robert Jordens
2b12679ef6 add pipistrello target 2015-02-26 21:35:42 -07:00
Sebastien Bourdeauducq
a3909bb5e2 Merge branch 'master' of https://github.com/m-labs/misoc 2015-02-26 21:28:12 -07:00
Yann Sionneau
8364fe6674 target/kc705: allow access to pll_sys signal before BUFG 2015-02-26 15:56:10 -07:00
Florent Kermarrec
5e8a0c496d gensoc: add mem_map and mem_decoder to avoid duplications 2015-02-26 20:12:27 +01:00
Florent Kermarrec
554731ae44 targets/simple: make it generic (no default_platform, use platform's default_clk_name/default_clk_period) 2015-02-26 13:08:15 +01:00
Florent Kermarrec
00862a383c liteeth: fix import (from liteeth --> from misoclib.liteeth) 2015-02-26 09:48:37 +01:00
Florent Kermarrec
73ab271f9a targets/kc705: fix csr address conflict on eth 2015-02-18 10:45:18 -07:00
Florent Kermarrec
0a38b8c74a add LiteX external core and remove ethmac 2015-02-18 10:43:44 -07:00
Florent Kermarrec
9ebb8f8022 remove verilog and move mxcrg.v to misoclib/mxcrg 2015-02-18 10:40:30 -07:00
Florent Kermarrec
ceb675c3f1 fix cf92821 merge issue 2014-12-19 21:49:49 +08:00
Yann Sionneau
edb1622668 spiflash: BB write support 2014-11-27 23:10:39 +08:00
Yann Sionneau
cf92821fcf Refactor directory hierarchy of sdram phys and controllers 2014-11-27 22:09:10 +08:00
Sebastien Bourdeauducq
33530e0921 ethmac: style/renaming 2014-11-20 18:01:48 -08:00
Sebastien Bourdeauducq
7eaa5f7372 targets/kc705: avoid ddrphy/ethphy address conflict 2014-11-20 17:11:57 -08:00
Florent Kermarec
603c2641bb new Ethernet MAC 2014-11-20 16:47:22 -08:00
Florent Kermarrec
13fb9282db targets: add simple design (vendor agnostic and usable on all platforms with UART pins). 
Designing a SoC with Migen is easy, but we have to provide a very simple design that can
be used on all boards with only 1 clock and 2 UARTs pins defined. This will encourage the
newcomer to invest time in Migen/MiSoC and see its real potential.
 2014-09-26 10:35:15 +08:00
Florent Kermarrec
c0c17030fd spi_flash: simplify usage by removing cmd, cmd_width, addr_width parameters 2014-09-04 15:23:39 +08:00
Sebastien Bourdeauducq
0eeb0ad9eb targets/kc705: add ddrphy to CSR map 2014-09-01 16:40:10 +08:00
Sebastien Bourdeauducq
35327a427f targets/kc705: BIOS XIP 2014-08-22 17:13:10 +08:00
Sebastien Bourdeauducq
6b35c7b8ea targets/ppro: reduce SPI flash clock frequency 2014-08-22 15:24:14 +08:00
Sebastien Bourdeauducq
7b10f1821f targets/ppro: fix BIOS address 2014-08-22 15:24:00 +08:00
Sebastien Bourdeauducq
2f2a57dd34 targets/ppro: clean up indentation 2014-08-22 14:41:28 +08:00
Sebastien Bourdeauducq
41c8c172b5 targets/kc705: integrate DDR3 2014-08-08 21:58:41 +08:00
Sebastien Bourdeauducq
fb48b89bac platforms/kc705: generate clocks for SDRAM 2014-08-06 23:53:26 +08:00
Sebastien Bourdeauducq
ca6d6954c1 targets/ppro: use migen reset synchronizer 2014-08-06 19:38:11 +08:00
Sebastien Bourdeauducq
37968e649b targets/kc705: use PLL for clocking 2014-08-03 21:42:39 +08:00
Sebastien Bourdeauducq
f7a7137127 targets: add basic KC705 2014-08-03 15:48:30 +08:00
Sebastien Bourdeauducq
213cb43ae5 Keep only basic SoC designs in MiSoC 2014-08-03 12:30:15 +08:00
Sebastien Bourdeauducq
ac97815619 targets/simple: pass kwargs 2014-05-24 11:29:03 +02:00
Sebastien Bourdeauducq
e9b49ebb44 Use SDRAM on the Papilio Pro 
Based on code by Robert Jordens
 2014-05-23 21:26:09 +02:00
Sebastien Bourdeauducq
6298624f98 sdramphy: remove fixed parameters 2014-05-14 16:08:40 +02:00
Sebastien Bourdeauducq
94b2295a96 targets/mlabs_video: pass with_memtest as kwargs 2014-05-14 15:02:07 +02:00
Sebastien Bourdeauducq
1c08aeb21c Initial mor1kx (OpenRISC) support 
Based on milkymist-ng-mor1kx by Stefan Kristiansson
 2014-05-14 10:24:56 +02:00
Florent Kermarrec
41c35e7e0c simple: create PowerOnRst and use it (remove vendor-dependent code) 2014-04-17 19:39:05 +02:00
Florent Kermarrec
1adceb8276 sdramphy: move and clean up s6ddrphy, add generic SDRAM PHY 2014-04-17 19:38:25 +02:00
Sebastien Bourdeauducq
362f938736 simplesoc: free LED 2014-04-14 00:23:41 +02:00
Sebastien Bourdeauducq
0c3f8f703d targets/simple: add dummy SDRAM + flash boot address 2014-04-08 15:25:49 +02:00
Sebastien Bourdeauducq
9e784fc82c Generate mem.h from SoC description 2014-02-21 17:55:05 +01:00
Sebastien Bourdeauducq
fce46ac0ca Simplify use of external targets/platforms/cores + add default platform in targets 2014-02-16 14:51:52 +01:00
Sebastien Bourdeauducq
e4273be517 targets/simple: use XIP from SPI flash 2014-02-14 15:48:15 +01:00
Sebastien Bourdeauducq
88d4962a1c targets/mlabs_video: use outer video inputs 2014-02-13 22:07:23 +01:00
Sebastien Bourdeauducq
ad974a07ef gensoc: support for user-defined UART and add default values for SRAM and L2 sizes 2014-01-06 22:12:42 +01:00
Sebastien Bourdeauducq
65f3c1ddff targets/mlabs_video: use new Cat syntax 2013-12-05 23:55:14 +01:00
Sebastien Bourdeauducq
352919d17e norflash: add support for writes 2013-11-30 20:37:56 +01:00
Sebastien Bourdeauducq
356178e680 targets/simple: map SPI flash 2013-11-25 15:08:53 +01:00
Sebastien Bourdeauducq
b49e6f07b2 targets/simple: add GPIO LED 2013-11-25 12:16:20 +01:00
Sebastien Bourdeauducq
78cd7a288e move integrated BIOS code to gensoc 2013-11-25 10:22:14 +01:00