Commit graph

8673 commits

Author SHA1 Message Date
Florent Kermarrec
f7d468dd1c cores/cpus: Generate all CPU configs as LiteX configs (for consistency). 2023-02-20 10:27:10 +01:00
Florent Kermarrec
a5d9d309e5 tools/litex_json2dts_linux: Add intial Rocket support (just to allow .dts generation as basis, now will need to be adapted). 2023-02-20 10:17:23 +01:00
Florent Kermarrec
8c79c2599f cpu/rocket/core: Initial changes for .dts generation through json2dts.
For now just add information missing by json2dts to generate the .dts similarly to VexRiscv-SMP.
2023-02-20 10:13:16 +01:00
Florent Kermarrec
c6394c8f27 integration/builder: Add support for --soc-csv/--soc-json/--soc-svd arguments.
Should be prefered over csr-xy since initial export was created when we were only interested
by CSR mapping export but has been extended since then to SoC mapping in general.
2023-02-20 09:34:30 +01:00
Florent Kermarrec
fbf63f2fc3 soc/cores/icap: Add UG570 reference and change _i/_o signal names. 2023-02-17 12:23:03 +01:00
Florent Kermarrec
9addd52990 soc/cores/esc: Add simple/initial ESC Dshot core supporting D150/300/600. 2023-02-17 09:29:16 +01:00
enjoy-digital
4fa0ea2fdb
Merge pull request #1598 from tpwrules/fix-litex-term
tools/litex-term: completely eliminate multiprocessing
2023-02-16 21:17:53 +01:00
enjoy-digital
fa872cfae0
Merge pull request #1602 from antmicro/msieron/spd-fixes
SDRAM SPD fixes
2023-02-16 21:06:54 +01:00
Michal Sieron
23d84bf5f5 liblitedram/sdram_rcd: fix no I2C case
Remove send_stop parameter from the no-I2C case as well.

Signed-off-by: Michal Sieron <msieron@antmicro.com>
2023-02-16 15:40:07 +01:00
Michal Sieron
f84ecaf707 liblitedram/sdram_spd: do not send stop symbol
According to the SPD specification, we shouldn't send
a stop symbol after the write that sets the address counter.

Signed-off-by: Michal Sieron <msieron@antmicro.com>
2023-02-16 14:35:00 +01:00
Michal Sieron
cdc1152162 liblitedram/sdram_spd: use temp_len when reading SPD
This change should change anything from the point of view of
`sdram_read_spd` caller, but it makes it so less I2C reads are actually
hapenning.

With `len` we read too many bytes and write them to the `buf`.
In subsequent iterations we overwrite those bytes as all counters are
being updated by the `temp_len`. Nothing terrible, but too many
bytes were being read.

Signed-off-by: Michal Sieron <msieron@antmicro.com>
2023-02-16 14:30:23 +01:00
Florent Kermarrec
90f690ecce README/BIOS: Bump year. 2023-02-16 09:10:01 +01:00
Thomas Watson
093c4fd166 tools/litex-term: completely eliminate multiprocessing
Like commit 460fada3ac,
multiprocessing breaks on Windows and macOS due to pickle failures.
2023-02-14 19:25:23 -06:00
Florent Kermarrec
106b2caaec soc/cores/xadc: Fix refactoring issue (Zync -> Zynq :)) 2023-02-13 15:43:43 +01:00
Florent Kermarrec
931b44ecd6 build/sim: Fix VIDEO flag generation. 2023-02-13 10:06:43 +01:00
Florent Kermarrec
44db314ddd integration/soc/add_video_framebuffer: Add video_framebuffer region definition in linker. 2023-02-10 19:48:36 +01:00
Florent Kermarrec
3de5f20496 build/sim/litex_sim: Only compiles video module when used.
Avoid additional SDL2 dependency for regular simulations.
2023-02-10 19:48:31 +01:00
Victor Suarez Rovere
1f08fe3286 build/sim/litex_sim: Add initial video module/support in simulation.
Simulation with framebuffer:
litex_sim --with-sdram --with-video-framebuffer

Simulation with video terminal:
litex_sim --with-sdram --with-video-terminal
2023-02-10 19:48:24 +01:00
Dolu1990
42f46c9c95 cpu/NaxRiscv fix nan-boxing on peripheral load 2023-02-10 17:21:53 +01:00
Florent Kermarrec
53e7492bd4 soc/cores/icap: Add clk_divider parameter and initial ICAPE3 support (Throught primitive parameters).
Compiles on Ultrascale but still needs to be tested.
2023-02-10 16:19:42 +01:00
Dolu1990
34422d2d91 cpu/NaxRiscv crt0.S now enable the FPU 2023-02-10 15:57:22 +01:00
Florent Kermarrec
ed48fb4d5d tools/litex_client: Add --binary argument to display values in binary.
Useful in some case to avoid decoding hexa manually.
2023-02-10 15:08:01 +01:00
Florent Kermarrec
5df1dacd18 cores/usb_ohci: Do minor review cleanups/changes. 2023-02-10 14:41:36 +01:00
enjoy-digital
d68bffb26e
Merge pull request #1597 from machdyne/master
support multiple usb_ohci ports
2023-02-10 14:38:16 +01:00
inc
211dfb2168 support multiple usb_ohci ports 2023-02-10 14:00:05 +01:00
Florent Kermarrec
2205a0c2c3 cores/xadc: Fix refactor issue. 2023-02-10 13:09:36 +01:00
Florent Kermarrec
408a68ba79 cores/dna: Add initial Ultrascale support. 2023-02-10 13:09:32 +01:00
Florent Kermarrec
b2053b7c52 cores/dna: Reduce default clk_divider to 2.
To fix https://github.com/enjoy-digital/litex/issues/1516.
2023-02-10 13:09:27 +01:00
Florent Kermarrec
838719c276 cores/xadc: Re-arrange and simplify code a bit. 2023-02-10 13:09:22 +01:00
Florent Kermarrec
8b36649c89 cores/xadc: Re-arrange and simplify code a bit. 2023-02-10 13:09:19 +01:00
Dolu1990
92032b446c
cpu/NaxRiscv fix with_fpu typo 2023-02-10 10:07:50 +01:00
enjoy-digital
ac9bb70245
Merge pull request #1595 from suarezvictor/fpu
add --with-fpu flag to Naxriscv CPU
2023-02-09 17:51:46 +01:00
Victor Suarez Rovere
2e5217352f add --with-fpu flag to Naxriscv CPU 2023-02-09 13:26:45 -03:00
enjoy-digital
d256a5e3a8
Merge pull request #1594 from trabucayre/litex_setup_bashrc
litex_setup: explain how to update permanently PATH env variable (#1589)
2023-02-08 19:27:47 +01:00
Gwenhael Goavec-Merou
64a1ecda6e litex_setup: explain how to update permanently PATH env variable (#1589) 2023-02-08 18:59:46 +01:00
Florent Kermarrec
c054dc13d9 bios/cmds/cmd_litedram: Fix sdram_spd_handler compilation condition. 2023-02-08 10:05:55 +01:00
Florent Kermarrec
a56a178768 software/liblitesdcard: Add missing SPI_DONE mask on read status. 2023-02-06 13:09:45 +01:00
Florent Kermarrec
61bbfa3eaa cores/spi/spi_master: Return raw/aligned mode on status register. 2023-02-06 13:08:53 +01:00
Florent Kermarrec
a6d9955c9d software/liblitedram/accessors: Fix conditions for write_dq_bitslip functions compilations.
Fixes #1583.
2023-01-30 09:04:45 +01:00
Florent Kermarrec
8ad728cd22 software/liblitedram/accessors: Add seperators to improve readability. 2023-01-30 09:00:23 +01:00
enjoy-digital
fb94cb0551
Merge pull request #1512 from antmicro/liblitedram_cleanup
Liblitedram cleanup
2023-01-26 18:50:51 +01:00
Maciej Dudek
68877742b1 liblitedram: Add ability to access and adjust delays per DQ line
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2023-01-26 13:12:37 +01:00
Maciej Dudek
4c605020f0 liblitedram: Codebase cleanup
Fix curly braces to be in the same line as the function header.
Fix function formating to be consistent in files.
Fix guards and add comments at the end of them.

Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2023-01-26 13:12:37 +01:00
Maciej Dudek
58fda1a385 liblitedram: Move PHY accessors to a separate file
They are independent from the training flow.

Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2023-01-26 13:12:37 +01:00
Maciej Dudek
25b502dec8 liblitedram: define SDRAM_WLC_DEBUG
SDRAM_WLC_DEBUG is 0 or 1 based on SDRAM_WRITE_LATENCY_CALIBRATION_DEBUG.
This reduces number of #ifdefs

Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2023-01-26 13:12:25 +01:00
Maciej Dudek
8e848f6a13 liblitedram: #define MODULO
It allows to replace repeating #ifdef SDRAM_PHY_DELAYS > 32

Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2023-01-26 13:12:25 +01:00
Maciej Dudek
3c02323cfe liblitedram: discard singular 1s that are surrounded by 0s
They are most likely glitches and won't be stable.

Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2023-01-26 13:12:25 +01:00
Maciej Dudek
cd89b62ff6 liblitedram: Fix LFSR
LFSR only returns 1 random bit per lfsr() call,
so we should concatenate 8 consecutive calls to obtain 1 random byte

Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2023-01-26 13:12:25 +01:00
Maciej Dudek
48f547885a liblitedram: Correctly support single x4 IC
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2023-01-26 13:12:25 +01:00
Maciej Dudek
7b7fdadd26 liblitedram: Move pattern testing to its own function
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2023-01-26 13:12:25 +01:00