Used to demonstrates how to easily create baremetal apps, boot to it with LiteX and
also ease litex_term testing.
To build it: export BUILD_DIR=xxyy/litex/litex/boards/targets/build/arty && make
To load it: lxterm /dev/ttyUSB1 --kernel=demo.bin
--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
[LXTERM] Received firmware download request from the device.
[LXTERM] Uploading demo.bin to 0x40000000 (9264 bytes)...
[LXTERM] Upload complete (9.8KB/s).
[LXTERM] Booting the device.
[LXTERM] Done.
Executing booted program at 0x40000000
--============= Liftoff! ===============--
LiteX minimal demo app built Dec 10 2020 17:13:02
Available commands:
help - Show this command
reboot - Reboot CPU
led - Led demo
donut - Spinning Donut demo
litex-demo-app> led
Led demo...
Counter mode...
Shift mode...
Dance mode...
litex-demo-app> donut
Donut demo...
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litex-demo-app>
should have no impact on normal operation, the path is
only for registering addresses that are correlated with
ECC errors as reported by the OPI device.
Restrict the clk/cmd scan to 1/2 tCK since the full scan is not required
and in some cases can compromise the calibration with the wrong best clk/cmd
value selection.
This should also allow using cmd_latency=0 in all cases.
To improve human readability and enable automatic validation, the tuples
in "reg" properties should be grouped using angle brackets.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Make indentation of the generated DTS more consistent, by always using 8
spaces (no TABs), and aligning continued lines.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
sfl_frame (in sfl.h) already had a payload size of 255.
This should give about a 10% speed gain due to reduced overhead. 8 bytes
of header per 251 bytes sent, as opposed to 8 bytes of header per 60
bytes sent
User can now only use set_ps7 and provides the .xci file, preset file or/and additional configuration:
To use a .xci file, in the design do:
self.cpu.set_ps7(xci="ps7.xci")
To use a preset:
self.cpu.set_ps7(preset="preset_name")
To use a config dict:
self.cpu.set_ps7(name="ps7_name", config={"param0": "0", "param1": "1"})
It's also possible to use preset and then pass and additionnal config dict:
self.cpu.set_ps7(preset="preset_name")
self.cpu.add_ps7_config({"param0": "0", "param1": "1"})
or all at once:
self.cpu.set_ps7(preset="preset_name", config={"param0": "0", "param1": "1"})
This prevents adding peripherals that requires IRQ support to SoC not supporting
them. Enabling is done automatically when a CPU with interrupt support is added,
but this can also be added manually.
As both clock and async reset for the debug DFFs were 0, and there was
no initial value on them, they were being validly optimised away by
newer Yosys versions to 1'bx which was propagating into and breaking the
core.
This fixes the problem by tying the async resets to the CPU reset
signal.
Signed-off-by: David Shah <dave@ds0.me>
Florent Kermarrec
bunnie
Stéphane Gourichon
Ilia Sergachev
Geert Uytterhoeven
David Shah
David Lattimore
Gwenhael Goavec-Merou
Gabriel Somlo