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575 commits

Author SHA1 Message Date
Larry Doolittle
9129d18bf5 Cleanup whitespaces
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-04-23 17:59:17 +02:00
Claire Wolf
409d0dfd67
Merge pull request from Novakov/patch-1
spimemio documentation: read latency reset value
2020-04-22 17:32:19 +02:00
Claire Wolf
fe1ee2c739
Merge pull request from RolinBert/master
Fix  (missing irqs)
2020-04-22 17:31:29 +02:00
Claire Wolf
65e72ea49e
Merge pull request from dehann/patch-1
fix readme icebreaker links
2020-04-22 17:25:28 +02:00
Claire Wolf
fb34c8aca9
Merge pull request from splinedrive/disable_memory_test
Workarround: Disable cmd_memtest() when starting firmware.
2020-04-22 17:25:05 +02:00
Claire Wolf
824a5c8011
Merge pull request from rxrbln/uart
added default clk divider parameter to simpleuart
2020-04-15 18:49:23 +02:00
René Rebe
a7ff70dfb4 added default clk divider parameter to simpleuart 2020-04-15 13:25:57 +02:00
dehann
b428e843cd
fix icebreaker links 2020-04-12 14:42:45 -04:00
Robert Korn
fac01cee1c - fix missing brackets 2020-03-30 19:00:28 +02:00
Robert Korn
258d63d476 - fix missed timer interrupts,
when another interrupt activates shortly before
2020-03-27 07:26:48 +01:00
Hirosh Dabui
1b6821d1a1 Workarround: Disable cmd_memtest() when starting firmware.
It destroys bss and data section memory.
You are not able to use static or global vars.
2020-01-27 02:19:56 +01:00
Maciej T. Nowak
0201e8ff02
spimemio documentation: read latency reset value
According to c06ba38113/picosoc/spimemio.v (L111) the reset value for `Read latency (dummy) cycles` is 8 cycles, not 0.
2020-01-03 21:57:19 +01:00
Clifford Wolf
e308982e18
Merge pull request from rxrbln/master
added CROSS prefix and CFLAGS to the picsoc/Makefile
2019-11-18 14:21:10 +01:00
René Rebe
1e24e99970 added CROSS prefix and CFLAGS to the picsoc/Makefile
so one can run it with other toolchains, e.g.
CROSS=riscv64-t2-linux-gnu- CFLAGS=-mabi=ilp32, too
2019-11-14 12:31:20 +01:00
Clifford Wolf
46aa89c13f
Merge pull request from pcotret/patch-1
Short modification in the error string
2019-10-31 11:25:37 +01:00
Pascal Cotret
415382761c
Short modification in the error string 2019-10-29 16:42:24 +01:00
Clifford Wolf
77277a0d32 Fix typo, closes
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-09-25 11:28:08 +02:00
Clifford Wolf
3f9b5048bc Fix initialization of "irq" in verilog testbench
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-09-22 13:59:43 +02:00
Clifford Wolf
881f928e05 Improve showtrace.py (and fix for new binutils)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-09-21 13:19:15 +02:00
Clifford Wolf
392ee1dd91 Improve test firmware, increase testbench memory size to 128kB
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-09-12 10:50:45 +02:00
Clifford Wolf
3bb692a954
Merge pull request from tomverbeure/dhry_trace
Add tracing support to dhrystone test
2019-08-19 13:12:54 +02:00
Tom Verbeure
6edd0bfe14 Add tracing support to dhrystone test 2019-08-18 08:32:45 -07:00
Clifford Wolf
d124abbacd
Update README.md 2019-08-09 09:23:17 +02:00
Clifford Wolf
e6779ba52b Disable verilator warnings, fixes
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-08-06 15:16:06 +02:00
Clifford Wolf
d046cbfa49 Add PICORV32_TESTBUG_nnn ifdefs for testing purposes
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-30 11:30:18 +02:00
Clifford Wolf
18cd609853 Add rvfi_ixl
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-26 00:07:16 +02:00
Clifford Wolf
e0baf2e0bd Add RVFI CSRs
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-07 00:04:37 +02:00
Clifford Wolf
3d36751b88 Do not peek into core for cycle count in WB testbench
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-03 08:17:08 +02:00
Clifford Wolf
f3a42746ca Do not peek into core for cycle count in testbench
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-03 08:14:16 +02:00
Clifford Wolf
b7e82dfcd1 Merge branch 'yanghao-master' 2019-04-28 10:32:49 +02:00
Clifford Wolf
cf69d4da58 Undo Makefile changes
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-28 10:32:23 +02:00
Yanghao Hua
d60ffd8eea fix firmware/sections.lds section size alignment on 4 bytes 2019-04-27 12:37:35 +02:00
Clifford Wolf
507f49d086
Merge pull request from Fatsie/wbdoc
README.md: Also refer to picorv32_wb
2019-04-17 13:02:49 +02:00
Staf Verhaegen
11d28a0f50 README.md: Also refer to picorv32_wb 2019-03-28 11:08:34 +01:00
Clifford Wolf
f48f5fe970 Add Verilator version infos
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-19 14:33:50 +01:00
Clifford Wolf
6d145b708d Rename decoded_imm_uj to decoded_imm_j
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-02 14:29:27 -08:00
Clifford Wolf
6efa7d1c8b Remove riscv-dejagnu from "make build-tools"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-02 14:12:07 -08:00
Clifford Wolf
348de8e797 Remove riscv-qemu from "make build-tools"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-02 14:12:07 -08:00
Clifford Wolf
1d42f5725b
Merge pull request from csquaredphd/master
fix typo in picosoc/Makefile for hx8k board
2019-03-02 14:11:59 -08:00
Clifford Wolf
243a09fd8d Add buffer cell to scripts/yosys/synth_gates.lib
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-02 09:17:56 -08:00
Chris Clark
7ac4102fc4 fix typo in picosoc/Makefile for hx8k board 2019-03-01 19:57:22 -05:00
Clifford Wolf
ed1138d6a6 Update riscv-gnu-toolchain to 411d134
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-19 10:47:53 +01:00
Clifford Wolf
5c081c3291
Merge pull request from stv0g/icebreaker-spram
Use SPRAM on ICE40UP5K based boards
2019-02-13 14:13:58 +01:00
Clifford Wolf
358dde2376
Merge branch 'master' into icebreaker-spram 2019-02-13 14:13:23 +01:00
Clifford Wolf
0886cc7562
Merge pull request from thoughtpolice/dev
Various touchups to scripts/icestorm demo
2019-02-13 14:10:47 +01:00
Clifford Wolf
e9e311d53e
Merge pull request from stv0g/cmd-echo
Added echo command to PicoSoc firmware for testing UART
2019-02-13 14:07:08 +01:00
Clifford Wolf
6e55b7afbc
Merge pull request from stv0g/add-torture-readme
Add readme file for torture test
2019-02-13 14:06:25 +01:00
Steffen Vogel
3710a86b81 icebreaker: artificially limit available RAM to speed-up simulation 2019-02-12 00:13:33 +01:00
Steffen Vogel
eb64df6c3e picosoc: use preprocessor for generating target-specific linker script 2019-02-11 23:44:47 +01:00
Steffen Vogel
f3b1246c86 picosoc: added memtest 2019-02-11 23:14:56 +01:00