Charles Papon
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889a040f90
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Fix multi port MMU design
Change machineCSR to handle exceptions from the writeBack stage
Change the DBusCachedPlugin to emit miss exception
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2017-05-01 14:29:37 +02:00 |
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Charles Papon
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2ed33106d6
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MMU pass simple regression !
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2017-04-29 19:58:17 +02:00 |
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Charles Papon
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227772f19c
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Add miss files
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2017-04-28 16:41:44 +02:00 |
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Charles Papon
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010ba568f0
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MMU implemented
Datacached using MMU implemented
It compile, but nothing is tested
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2017-04-28 16:41:23 +02:00 |
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Charles Papon
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ba2ca77114
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Two stage datacache now pass dhrystone benchmark without error
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2017-04-23 23:15:38 +02:00 |
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Charles Papon
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9040326273
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WIP two stage DCache, nearly passed the dhrystone benchmark
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2017-04-23 18:31:16 +02:00 |
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Charles Papon
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e00bf028cb
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Add HazardPessimisticPlugin for light and very good FMAX hazard tracking
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2017-04-17 17:56:47 +02:00 |
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Charles Papon
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024e14ae58
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Smaller and faster single stage instruction cache
Add fast two stage instruction cache
Remove useless address == 0 checks in the HazardPlugin
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2017-04-13 18:27:03 +02:00 |
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Charles Papon
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c83a157c64
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IBusCachedPlugin with twoStage config is now compatible with syncronous regfile
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2017-04-09 11:59:09 +02:00 |
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Charles Papon
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9a4c35d7b6
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IBusCachedPlugin twoStage config fix
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2017-04-08 18:34:44 +02:00 |
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Charles Papon
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e3b9e671ec
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IBusCachedPlugin add two stage cache option for better FMax and better scaling
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2017-04-08 17:42:13 +02:00 |
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Charles Papon
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5c594d6d2a
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IBusCachedPlugin move memory access outside the pipeline
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2017-04-07 13:27:47 +02:00 |
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Charles Papon
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8f09867bda
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Cleaning
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2017-04-07 13:09:31 +02:00 |
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Charles Papon
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efb27390a7
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Better IntAluPlugin
Better SrcPlugin
Better DBusCachedPlugin
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2017-04-06 01:28:52 +02:00 |
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Charles Papon
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2e02a6f0e7
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DBusCachedPlugin better write to read hazard logic (FMAX)
Add some TODO FMAX comments
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2017-04-05 18:37:02 +02:00 |
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Charles Papon
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179e7f7b4c
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IBusCachedPlugin add asyncTagMemory option
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2017-04-05 14:25:11 +02:00 |
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Charles Papon
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2b24cbc8e1
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Add pessimistic harzard options
Add separated add/sum option in srcPlugin
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2017-04-04 00:25:39 +02:00 |
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Charles Papon
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acb85a1fb8
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Add some decoder comments
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2017-04-03 01:33:54 +02:00 |
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Charles Papon
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8ff05bd2a8
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Much better decoder using Quine-Mc Cluskey
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2017-04-02 21:05:25 +02:00 |
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Charles Papon
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a9f7177181
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Data cache pass dhrystone benchmark.
Data cache todo -> bus error handling
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2017-04-01 17:06:59 +02:00 |
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Charles Papon
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2f384364d8
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Data cache WIP
refractoring
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2017-03-31 15:20:51 +02:00 |
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Charles Papon
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26597f78cd
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cleaning
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2017-03-31 11:06:40 +02:00 |
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Charles Papon
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19fe998a52
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Instruction cache is now able to catch bus errors
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2017-03-30 17:34:24 +02:00 |
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Charles Papon
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95585b4d9a
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Add instruction cache plugin (tested)
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2017-03-30 10:03:53 +02:00 |
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Charles Papon
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32d32845bd
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Add tests for iRsp, dRsp access faults
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2017-03-28 20:25:58 +02:00 |
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Charles Papon
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2cb0e90077
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refractoring/cleaning
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2017-03-28 01:53:37 +02:00 |
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Charles Papon
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62a55c4cf4
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Add IRsp/dRsp ready + error capabilities to stall the bus and to generate access error exceptions
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2017-03-28 01:24:29 +02:00 |
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Charles Papon
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eecc1e6b18
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Add MachineCsr.mbadaddr logics
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2017-03-27 18:35:27 +02:00 |
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Charles Papon
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349d600182
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Better readme
cleaning
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2017-03-27 00:33:34 +02:00 |
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Charles Papon
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e5148e5e05
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Better readme
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2017-03-26 22:43:00 +02:00 |
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Charles Papon
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70e8bc503e
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Add readme
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2017-03-26 22:38:07 +02:00 |
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Charles Papon
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91c52f4e46
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Decoder now catch illegal instructions
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2017-03-26 18:02:48 +02:00 |
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Charles Papon
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c5520656e5
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Now able to catch missaligned instruction/data addresses
Modify arbitration with an flushAll + isFlushed
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2017-03-26 17:20:07 +02:00 |
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Charles Papon
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4000191966
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FreeRTOS tested
removeIt no more colapse bubbles
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2017-03-25 16:44:42 +01:00 |
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Charles Papon
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9bbf3ee3e7
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MachineCsr fix csr set/clear with zero
MachineCsr pass external/timer interrupts test
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2017-03-24 17:40:37 +01:00 |
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Charles Papon
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72d65841d2
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MachineCsr pass simple interrupt and exception tests
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2017-03-23 23:12:44 +01:00 |
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Charles Papon
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ed0660237f
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MachineCsr wireing/logic done
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2017-03-23 01:00:24 +01:00 |
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Charles Papon
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de4c2470c8
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MachineCsr add mcycle and minstret
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2017-03-22 20:38:43 +01:00 |
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Charles Papon
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94770f8e0b
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Add MachineCsr (untested)
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2017-03-22 18:29:34 +01:00 |
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Charles Papon
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e9d3977737
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Add Arbitration.flushIt
Add ExceptionService
Add unremovableStage
Add MachineCsr (untested)
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2017-03-21 18:40:50 +01:00 |
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Charles Papon
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c49373f3d1
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Fix missing JAL, JALR encoding
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2017-03-21 10:29:09 +01:00 |
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Charles Papon
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787682d4f6
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Add comments
Some refractoring
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2017-03-20 14:49:49 +01:00 |
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Charles Papon
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51058f851e
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Renaming
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2017-03-20 12:37:53 +01:00 |
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Charles Papon
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ecf853f491
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Add Static/Dynamic branch prediction
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2017-03-20 12:37:20 +01:00 |
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Charles Papon
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d569242124
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Add Static branch prediction in decode stage
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2017-03-19 23:27:35 +01:00 |
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Charles Papon
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88dee6d2bc
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Reduce area with reg[0] optimisation
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2017-03-18 19:32:54 +01:00 |
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Charles Papon
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fc1bb7249a
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Add trace option to regresion
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2017-03-18 14:06:42 +01:00 |
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Charles Papon
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5e9da0f27a
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Add self checked dhrystone test
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2017-03-18 12:32:14 +01:00 |
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Charles Papon
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31db6511dc
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Fix performance of removed instruction which halt were halting the pipeline
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2017-03-18 10:51:55 +01:00 |
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Charles Papon
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20ca348707
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Fix dCmd sent while the execute stage is removed
Pass dhrystone benchmark without error !
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2017-03-17 21:26:42 +01:00 |