Commit Graph

53 Commits

Author SHA1 Message Date
Dolu1990 36b3cd9188 Merge branch 'dev' 2021-02-01 12:19:21 +01:00
Dolu1990 e58daee088 SpinalHDL++ 2020-10-16 11:25:25 +02:00
Dolu1990 c3540bc6e0
SpinalHDL 1.4.2 2020-05-20 10:37:52 +02:00
Dolu1990 95237b23ea SpinalHDL 1.4.0
Merge branch 'dev'
2020-03-09 13:49:06 +01:00
Dolu1990 5f90702b2f SpinalHDL update 2020-03-09 13:14:16 +01:00
Dolu1990 04bf1a4ced Fix build.sbt 2020-03-08 00:23:19 +01:00
Dolu1990 7a5afb86a5 Fix build.sbt 2020-03-07 19:09:33 +01:00
Charles Papon 10da093422 Fix sbt 2020-02-06 21:07:40 +01:00
Charles Papon 38a573a48c Update build.sbt 2020-02-03 13:35:55 +01:00
Charles Papon 390645e581 SpinalHDL 1.3.8 2020-01-29 23:20:35 +01:00
Charles Papon b2e06ae198 Back into unreleased SpinalHDL 2019-06-17 17:19:11 +02:00
Charles Papon 4cf7e5b98f SpinalHDL 1.3.6 2019-06-16 00:42:59 +02:00
Charles Papon 4ce9d805b4 Switch to unreleased SpinalHDL 2019-05-14 00:41:14 +02:00
Charles Papon 8201cff7ff SpinalHDL 1.3.4 2019-05-10 14:27:14 +02:00
Charles Papon 7d99a70e9c Switch to released SpinalHDL 2019-05-01 12:02:27 +02:00
Charles Papon 431bec84fb Switch to SpinalHDL 1.3.3 (release) 2019-04-24 22:17:46 +02:00
Dolu1990 03663ce91a Move unreleased SpinalHDL 2019-03-15 17:35:31 +01:00
Dolu1990 2e0b63bc67 SpinalHDL 1.3.2 2019-03-10 11:12:43 +01:00
Dolu1990 e0c8ac01d2 Add custom external interrupts 2019-02-03 15:20:34 +01:00
Dolu1990 f4f854ae4f SpinalHDL 1.3.1 2019-01-14 13:32:16 +01:00
Dolu1990 92065a1a10 Update to SpinalHDL 1.3.0 2018-12-30 15:51:46 +01:00
Dolu1990 b1b7da4f10 Rename SimpleBus into PipelinedMemoryBus
Move PipelinedMemoryBus into SpinalHDL lib
2018-11-30 17:37:17 +01:00
Dolu1990 f18696357f SpinalHDL 1.2.2 2018-11-22 22:45:07 +01:00
Dolu1990 3e17461cc7 Add optional XIP to Murax 2018-09-16 11:00:56 +02:00
Dolu1990 0476de8066 Move to SpinalHDL 1.2.0 2018-09-16 10:16:43 +02:00
Dolu1990 d7cba38ec2 move to SpinalHDL 1.1.7, add more default value for plugins parameters 2018-09-11 16:08:28 +02:00
Snoopy87 304c8156a0
Update version 2018-08-24 06:51:10 +02:00
Dolu1990 5943ee727e Fill travis, DhrystoneBench is now a Unit test 2018-05-28 09:02:01 +02:00
Dolu1990 35fbf177e2 Update to SpinalHDL 1.1.6 2018-05-16 12:12:09 +02:00
Dolu1990 2f8f4d5444 SpinalHDL 1.1.5 2018-03-13 15:45:56 +01:00
Dolu1990 53970dd284 SpinalHDL 1.1.4
Now the CsrPlugin is waiting that the memory/writeback stages are empty before reading/writing things
2018-03-05 14:34:59 +01:00
Dolu1990 3b3bbd48b9 SpinalHDL 1.1.3 => Now Verilog rom are emited into separated bin files 2018-01-20 18:29:33 +01:00
Dolu1990 9a89573942 SpinalHDL 1.1.2
Add Murax setup with Mul Div Barriel
2018-01-06 22:09:42 +01:00
Dolu1990 4ed19f2cc5 SpinalHDL 1.1.1 2017-12-30 03:36:57 +01:00
Dolu1990 0d39e38906 SpinalHDL 1.1.0 2017-12-28 13:49:39 +01:00
Dolu1990 3a913f0789 SpinalHDL 1.0.5 2017-12-22 23:18:34 +01:00
Dolu1990 7f2b2181c1 SpinalHDL 1.0.3 2017-12-19 21:21:16 +01:00
Dolu1990 37849b7a66 Spinal 1.0.2 sim update 2017-12-19 00:40:52 +01:00
Dolu1990 15463a6276 spinalhdl 1.0.1 2017-12-17 19:36:18 +01:00
Dolu1990 2259c9cb0f Add SpinalHDL sim (1.0.0) 2017-12-14 00:57:12 +01:00
Dolu1990 f10dabd253 SpinalHDL 0.11.5 update 2017-12-05 15:58:05 +01:00
Dolu1990 e1b86ea511 SpinalHDL 0.11.4 update 2017-12-01 11:19:23 +01:00
Dolu1990 ce6fd6d0aa Add VexRiscvAxi4 demo 2017-11-20 23:57:37 +01:00
Dolu1990 9f9ec823b8 SpinalHDL 0.11.2 2017-11-15 17:57:08 +01:00
Dolu1990 6c3fed3505 SpinalHDL 0.11.1 2017-11-15 16:44:42 +01:00
Dolu1990 ba42f71813 pass VexRiscv regressions 2017-10-30 14:29:25 +01:00
Charles Papon a37494f27f Set sbt organization to com.github.spinalhdl 2017-08-01 20:43:15 +02:00
Charles Papon 823ac353ff Add Murax SoC (very light, work on ice40) 2017-07-28 21:25:49 +02:00
Charles Papon a94343b98a Update to SpinalHDL 0.10.14 2017-06-17 15:15:19 +02:00
Charles Papon 11a63491bd Add YAML feature to store CPU info 2017-06-09 16:06:18 +02:00