Commit graph

1042 commits

Author SHA1 Message Date
Florent Kermarrec
a611778e3d litedram/init/get_sdram_phy_c_header: add CL/CWL defines. 2020-09-30 19:19:31 +02:00
Florent Kermarrec
6d063b196c test/reference: update. 2020-09-30 18:06:48 +02:00
Florent Kermarrec
18e8f5c565 phy/usddrphy: add dynamic read/write phase support. 2020-09-30 17:13:55 +02:00
Florent Kermarrec
afe29d4231 phy/s7ddrphy: add dynamic read/write phase support. 2020-09-30 17:13:41 +02:00
Florent Kermarrec
a67aed2a02 init/get_sdram_phy_c_header: add support for dynamic write/read phases. 2020-09-30 17:07:34 +02:00
Florent Kermarrec
c4d7083677 test/reference: update. 2020-09-30 13:29:39 +02:00
Florent Kermarrec
d06e2dda23 phy/usddrphy: simplify dq_bitslip.o mapping. 2020-09-30 11:41:43 +02:00
Florent Kermarrec
6b0591920b phy/usddrphy: simplify commands. 2020-09-30 11:39:07 +02:00
Florent Kermarrec
1d756cb209 phy/usddrphy: simplify OSERDESE3/ISERDESE3 data mapping. 2020-09-30 10:44:41 +02:00
Florent Kermarrec
5d41cce080 phy/gensdrphy: simplify commands and add dm support. 2020-09-30 10:39:36 +02:00
Florent Kermarrec
b772bb54a7 phy/ecp5ddrphy: simplify commands and ODDR/IDDR data mapping. 2020-09-30 09:52:39 +02:00
Florent Kermarrec
db8eaff086 phy/ecp5ddrphy: fix regression after DQS/DM changes. 2020-09-30 09:11:39 +02:00
Florent Kermarrec
c17bf3f5a1 phy/s7ddrphy: simplify commands (avoid duplication between address/banks/controls). 2020-09-30 08:04:45 +02:00
Florent Kermarrec
7f347af1ed phy/s7ddrphy: simplify ISERDESE2/OSERDESE2 data mapping using for loops. 2020-09-30 07:33:52 +02:00
Florent Kermarrec
68e9a02a55 litedram/common: add cl/cwl values for DDR4 data rates from 1333MT/s to 2666MT/s. 2020-09-29 19:46:39 +02:00
Florent Kermarrec
c2d1cf358b phy/ecp5/s7/usddrphy: separate DQS/DM to improve readability. 2020-09-29 19:23:34 +02:00
Florent Kermarrec
5aaffb7c16 phy/s7ddrphy: remove dqs_i/dqs_i_delayed (no longer used). 2020-09-29 19:00:25 +02:00
Florent Kermarrec
e69dbd2d91 bench: add DDR3 Mode Register settings generator.
Useful to change timing/electrical settings dynamically and bringup/debug DDR3 on new hardware.
2020-09-24 17:51:22 +02:00
Florent Kermarrec
7ccb7d8f16 test/reference: update. 2020-09-24 15:03:35 +02:00
Florent Kermarrec
5257197475 bench: add DDR4 Mode Register settings generator.
Useful to change timing/electrical settings dynamically and bringup/debug DDR4 on new hardware.
2020-09-24 14:57:14 +02:00
Florent Kermarrec
db54e325c8 phy/usddrphy: reduce BitSlip cycles to 1 sys_clk.
Increasing it to 2 hasn't been useful.
2020-09-24 13:36:02 +02:00
Florent Kermarrec
06544c6547 bench: uniformize targets with 125MHz clock and Etherbone. 2020-09-24 13:03:07 +02:00
Florent Kermarrec
0279b770ee phy/s7ddrphy: avoid cdly CSRs when no odelay capability. 2020-09-22 10:58:14 +02:00
Florent Kermarrec
6fc6174c38 bench/genesys2: expose uart parameter. 2020-09-17 08:22:17 +02:00
Florent Kermarrec
8525a27762 test/reference: update. 2020-09-15 20:00:55 +02:00
Florent Kermarrec
8d39ac6dd1 phy/s7ddrphy: remove interface_type parameter and ISERDESE2's MEMORY_MODE support.
Supporting MEMORY_MODE add complexity to the codebase and this mode is not used by anyone.
It has been experimented on NeTV2 to solves instability at low temperature but hasn't improved
the behaviour.
2020-09-15 19:55:58 +02:00
Florent Kermarrec
c3b4b0d338 phy/s7ddrphy: reduce BitSlip's cycles to 1 (seems to be enough for all cases). 2020-09-15 19:50:45 +02:00
Florent Kermarrec
26e45d1ce4 phys: add support for dynamic rd/rdcmd/wr/wrcmd phases. 2020-09-14 18:57:20 +02:00
Florent Kermarrec
6a5f2fdb09 bench/genesys2: add uart_name parameter.
Useful when Etherbone is just used to reload BIOS.
2020-09-14 18:43:33 +02:00
Florent Kermarrec
f5184b41b5 core/multiplexer/steerel_sel: add support for dynamic rd/rdcmd/wr/wrcmd phases.
This is useful for development and also simplifies code (without using more resources when constants are used).
2020-09-14 18:40:58 +02:00
Florent Kermarrec
020cff1970 bench/genesys2: add back Etherbone (faster for BIOS dev) and add --load-bios/set-sys_clk arguments. 2020-09-14 10:55:16 +02:00
Florent Kermarrec
6a75aa0ad7 bench/common: add s7_load_bios/s7_set_sys_clk functions. 2020-09-14 10:54:35 +02:00
Florent Kermarrec
7eeea34c4e bench: use 115200bauds UART on all targets (fast enough and simplify switch betwen targets). 2020-09-14 10:05:55 +02:00
Florent Kermarrec
e56f74e08b test/reference: update. 2020-09-07 19:37:03 +02:00
Florent Kermarrec
cf45ca48bc s7ddrphy/usddrphy: add cmd_delay parameter and pass cmd_latency/cmd_delay to PhySettings/Software. 2020-09-07 18:50:01 +02:00
Florent Kermarrec
3bab6f2024 common/PHYPadsReducer: make Cat optional (disabled by default). 2020-09-04 11:10:48 +02:00
Florent Kermarrec
543a94dd33 bench/common: enable load_rom on kcu105 (with delay workaround). 2020-09-03 17:46:50 +02:00
Florent Kermarrec
41c8ac637d common/PHYPadsReducer: add Cat around Array (helps for standalone core integration). 2020-09-02 09:40:14 +02:00
Florent Kermarrec
d5fa60240b litedram/gen: update LiteDRAMECP5DDRPHYCRG (AsyncResetSynchronizer integrated in PLL). 2020-09-01 13:58:16 +02:00
Florent Kermarrec
7d9c1de0a4 modules: remove unnecessary memtypes. 2020-09-01 13:43:09 +02:00
Florent Kermarrec
7d0dac78c5 bench/kcu105: add a second pll to reduce frequency steps. 2020-08-28 19:03:44 +02:00
Florent Kermarrec
0412dbd01d phy/usddrphy: add global rst CSR and set default cmd_latency to 1. 2020-08-28 18:49:33 +02:00
Florent Kermarrec
1fb78fa558 bench: cleanup, do more testing on 7-series. 2020-08-28 17:57:59 +02:00
Florent Kermarrec
f43cfad4e3 phy/s7ddrphy: add global rst CSR and set default cmd_latency to 1 on Kintex7/Ultrascale. 2020-08-28 17:56:48 +02:00
Florent Kermarrec
248c5de517 bench: switch to UARTBone to simplify (and to allow testing boards without ethernet capability) and improve test. 2020-08-28 03:47:49 +02:00
Florent Kermarrec
6f2462b731 bench: add kc705. 2020-08-27 19:05:17 +02:00
Florent Kermarrec
d3502e6a9b bench: add common.py with common bench test code. 2020-08-27 19:05:05 +02:00
Florent Kermarrec
2e3e19e9d4 bench: simplify/improve, working on arty/genesys2. 2020-08-27 18:41:54 +02:00
Florent Kermarrec
5c69da5d6d bench: add initial kcu105 bench target. 2020-08-24 21:56:11 +02:00
Florent Kermarrec
9995c0fefb bench: switch integrated_rom to "rw" mode and reload it over Etherbone at startup.
This simplifies software development.
2020-08-24 18:40:54 +02:00