Sebastien Bourdeauducq
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369086a178
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soc: simplify integrated memory parameters
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2015-04-02 00:09:38 +08:00 |
Florent Kermarrec
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340014dbac
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targets: revert use of integers in clocks/timings
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2015-03-26 23:45:35 +01:00 |
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Florent Kermarrec
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ba8b24df57
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sdram: pass module as phy parameter, define memtype in modules and only keep phy parameter in register_sdram_phy
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2015-03-25 16:57:38 +01:00 |
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Florent Kermarrec
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d33729dda9
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targets: pipistrello/ppro, fix stupid mistake 10ex --> 1ex...
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2015-03-22 02:33:29 +01:00 |
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Florent Kermarrec
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cf17f06860
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targets: fix CLKIN1_PERIOD on ppro and pipistrello
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2015-03-22 00:30:21 +01:00 |
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Florent Kermarrec
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30c2521eb0
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sdram: pass sdram_controller_settings to SDRAMSoC
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2015-03-21 23:12:18 +01:00 |
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Florent Kermarrec
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70469e1f37
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sdram: simplify the way we pass settings to controller and rename ramcon_type to sdram_controller_type (more explicit)
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2015-03-21 21:32:39 +01:00 |
|
Florent Kermarrec
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c55199deb9
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misoclib/soc: add _integrated_ to cpu options to avoid confusion
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2015-03-21 20:51:37 +01:00 |
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Florent Kermarrec
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de2f1c31d5
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sdram: create module.py to define SDRAM modules and use it on de0nano/ppro targets
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2015-03-21 16:56:53 +01:00 |
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Florent Kermarrec
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6e4b7c6cfd
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sdram: split sdram_timing in sdram_timing_settings/sdram_controller_settings
req_queue_size, read_time, write_time settings are not sdram_timing settings but sdram controller settings
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2015-03-21 12:55:39 +01:00 |
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Florent Kermarrec
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28d04ec300
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soc: rename with_sdram option to with_main_ram (with_sdram was confusing)
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2015-03-14 00:49:19 +01:00 |
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Florent Kermarrec
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2b9397ff5b
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targets: do not implement sdram if already provided by SoC (allow use of -Ot with_sdram = True)
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2015-03-06 07:56:45 +01:00 |
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Florent Kermarrec
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0716dadaf2
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targets: keep the SPI flash core even if with_rom is enabled, so that flash booting in the BIOS still works
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2015-03-03 10:39:31 +01:00 |
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Florent Kermarrec
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de698c51e4
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sdram: rename self.phy_settings to self.settings (using phy.settings instead of phy.phy_settings seems cleaner)
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2015-03-02 11:29:43 +01:00 |
|
Florent Kermarrec
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6107b7844a
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test implementation on all targets and fix issues
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2015-02-28 12:04:51 +01:00 |
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Florent Kermarrec
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69e869893d
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remane GenSoC to SoC (more coherent and we will add support for multiple SoCs with their own Wisbbone/CSR buses in the future)
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2015-02-28 11:36:15 +01:00 |
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Florent Kermarrec
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2c51adcd68
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misoclib: better organization (create cores categories: cpu, mem, com, ...)
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2015-02-28 09:40:44 +01:00 |
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Florent Kermarrec
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5e2e9338d2
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bios: we can now use -Ot with_rom True on targets to force bios implementation in integrated rom (can speed up debug we don't want to reflash SPI or NOR flash)
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2015-02-27 17:22:44 +01:00 |
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Florent Kermarrec
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367db268ad
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reserve csr_map 0-->16 for gensoc internal csrs
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2015-02-27 14:18:13 +01:00 |
Yann Sionneau
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edb1622668
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spiflash: BB write support
|
2014-11-27 23:10:39 +08:00 |
|
Yann Sionneau
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cf92821fcf
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Refactor directory hierarchy of sdram phys and controllers
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2014-11-27 22:09:10 +08:00 |
|
Florent Kermarrec
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c0c17030fd
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spi_flash: simplify usage by removing cmd, cmd_width, addr_width parameters
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2014-09-04 15:23:39 +08:00 |
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Sebastien Bourdeauducq
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6b35c7b8ea
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targets/ppro: reduce SPI flash clock frequency
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2014-08-22 15:24:14 +08:00 |
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Sebastien Bourdeauducq
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7b10f1821f
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targets/ppro: fix BIOS address
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2014-08-22 15:24:00 +08:00 |
|
Sebastien Bourdeauducq
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2f2a57dd34
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targets/ppro: clean up indentation
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2014-08-22 14:41:28 +08:00 |
|
Sebastien Bourdeauducq
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ca6d6954c1
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targets/ppro: use migen reset synchronizer
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2014-08-06 19:38:11 +08:00 |
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Sebastien Bourdeauducq
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213cb43ae5
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Keep only basic SoC designs in MiSoC
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2014-08-03 12:30:15 +08:00 |