133 commits

Author	SHA1	Message	Date
Sebastien Bourdeauducq	ca7056b07f	fhdl: support forwarding of bidirectional signals from instance ports	2012-02-16 18:34:32 +01:00
Sebastien Bourdeauducq	ef7aea0f31	bank: omit device write register when access_bus==READ_ONLY and access_dev==WRITE_ONLY	2012-02-15 18:23:31 +01:00
Sebastien Bourdeauducq	91e279ee04	bank/csrgen: use new bus API	2012-02-15 16:42:17 +01:00
Sebastien Bourdeauducq	0493212124	bus: simplify and cleanup ... Unify slave and master interfaces Remove signal direction suffixes Generic simple interconnect Wishbone point-to-point interconnect Description filter (get_name) Misc cleanups	2012-02-15 16:30:16 +01:00
Sebastien Bourdeauducq	0c214b484e	Use double quotes for all strings	2012-02-14 13:12:43 +01:00
Sebastien Bourdeauducq	3a2a0c4dd8	bank: support registers larger than the bus word width	2012-02-06 16:15:27 +01:00
Sebastien Bourdeauducq	f3ddfffc47	bank: refactoring	2012-02-06 13:55:50 +01:00
Sebastien Bourdeauducq	3143608e0a	examples/wb_intercon: update to new APIs	2012-01-28 23:18:21 +01:00
Sebastien Bourdeauducq	685b5eb08f	fhdl: support memory read enable	2012-01-27 21:39:23 +01:00
Sebastien Bourdeauducq	5405a83ff9	fhdl: memories working	2012-01-27 20:22:17 +01:00
Sebastien Bourdeauducq	076c171c7b	Use meaningful class names	2012-01-20 23:07:32 +01:00
Sebastien Bourdeauducq	a1043d11c0	examples/corelogic_conv: use two dividers	2012-01-16 19:38:39 +01:00
Sebastien Bourdeauducq	bdde97f5fd	New naming system beginning to work	2012-01-16 18:42:55 +01:00
Sebastien Bourdeauducq	e6bfad498d	actorlib/control: 'for' generator	2012-01-15 22:08:33 +01:00
Sebastien Bourdeauducq	85491efc68	wishbone_dma: convert to new endpoint API and fix some bugs	2012-01-15 16:41:15 +01:00
Sebastien Bourdeauducq	a6e5f3e766	flow: simplify actor fragment interface	2012-01-10 15:54:51 +01:00
Sebastien Bourdeauducq	683e6b4a6c	record: support aligned flattening	2012-01-09 19:16:11 +01:00
Sebastien Bourdeauducq	b06e70d849	corelogic: FSM	2012-01-09 16:28:48 +01:00
Sebastien Bourdeauducq	89bf704b2b	record: preserve order	2012-01-09 15:14:42 +01:00
Sebastien Bourdeauducq	bdcaeb159b	flow: draw network graph	2012-01-09 14:21:54 +01:00
Sebastien Bourdeauducq	d2d55372d8	Composer (WIP)	2012-01-08 13:56:11 +01:00
Sebastien Bourdeauducq	0b195a244d	flow: network	2012-01-07 00:33:28 +01:00
Sebastien Bourdeauducq	588f1a259e	flow: plumbing	2012-01-06 17:24:05 +01:00
Sebastien Bourdeauducq	038992e7d2	corelogic: record	2012-01-06 11:20:44 +01:00
Sebastien Bourdeauducq	9366a226bb	Convert -> convert	2012-01-05 19:27:33 +01:00
Sebastien Bourdeauducq	1ce4fbdb98	example: flow conversion	2011-12-23 00:36:07 +01:00
Sebastien Bourdeauducq	af0a03b65f	examples: remove old-style declarations	2011-12-18 21:54:39 +01:00
Sebastien Bourdeauducq	39b7190334	Pay a bit more attention to PEP8	2011-12-16 16:02:55 +01:00
Sebastien Bourdeauducq	6f7a35e0a3	examples: Wishbone interconnect test bench	2011-12-13 14:10:56 +01:00
Sebastien Bourdeauducq	5034af3038	Corelogic conversion example	2011-12-08 21:25:05 +01:00
Sebastien Bourdeauducq	1b637cea61	Instance support	2011-12-08 16:35:32 +01:00
Sebastien Bourdeauducq	ec51f09c98	Case support + register bank generator	2011-12-05 17:43:56 +01:00
Sebastien Bourdeauducq	5acf2e169f	Examples folder	2011-12-04 23:39:48 +01:00