Florent Kermarrec
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8e0553670a
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remove limitation on debug tuple definition
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2015-02-19 10:52:57 +01:00 |
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Florent Kermarrec
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5f19955825
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rle: expose length parameter to user, add assertion on dw to encode counter and automatically increase dw in rle mode
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2015-02-19 10:42:13 +01:00 |
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Florent Kermarrec
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5fb6beb473
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enable RLE only in POST_HIT_RECORDING state (to ensure programmed offset is respected)
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2015-02-19 10:26:34 +01:00 |
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Florent Kermarrec
|
788652c6f8
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simplify RLE
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2015-02-19 01:43:04 +01:00 |
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Florent Kermarrec
|
87f29a307a
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fix typo
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2015-02-18 23:35:50 +01:00 |
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Florent Kermarrec
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3680b48216
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dump/sigrok: fix against real dumps, now able to import and export
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2015-02-18 21:45:36 +01:00 |
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Florent Kermarrec
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6db831e5a8
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update LiteX
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2015-02-18 11:39:22 -07:00 |
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Florent Kermarrec
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73ab271f9a
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targets/kc705: fix csr address conflict on eth
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2015-02-18 10:45:18 -07:00 |
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Florent Kermarrec
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0a38b8c74a
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add LiteX external core and remove ethmac
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2015-02-18 10:43:44 -07:00 |
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Florent Kermarrec
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9ebb8f8022
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remove verilog and move mxcrg.v to misoclib/mxcrg
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2015-02-18 10:40:30 -07:00 |
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Florent Kermarrec
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5500c41915
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move lm32/mor1kx submodules to extcores
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2015-02-18 10:39:18 -07:00 |
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Florent Kermarrec
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4c9554b65c
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gensoc: call do_exit after SoC is built
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2015-02-18 10:38:14 -07:00 |
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Florent Kermarrec
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9326985e05
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update LiteScope
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2015-02-18 16:53:02 +01:00 |
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Florent Kermarrec
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e6f1bdb152
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update LiteScope
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2015-02-18 16:51:35 +01:00 |
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Florent Kermarrec
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6bfd5ce1d8
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split host files since we now have more drivers/dumps supported
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2015-02-18 16:49:38 +01:00 |
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Florent Kermarrec
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08935dce9a
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make.py: add powered by Migen
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2015-02-18 16:39:18 +01:00 |
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Florent Kermarrec
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e17791a85b
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readme/make.py: add powered by Migen
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2015-02-18 16:38:48 +01:00 |
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Florent Kermarrec
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2f6465d439
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add sigrok import (to check export against it)
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2015-02-18 15:23:04 +01:00 |
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Florent Kermarrec
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130212039e
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continue sigrok export (should almost work)
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2015-02-18 11:59:35 +01:00 |
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Florent Kermarrec
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cd43163d9d
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add sigrok export skeleton (wip)
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2015-02-18 00:44:33 +01:00 |
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Florent Kermarrec
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70f94ea0eb
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logo : add powered by Migen
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2015-02-17 23:17:46 +01:00 |
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Florent Kermarrec
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89eaef0e43
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logo : add powered by Migen
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2015-02-17 23:16:06 +01:00 |
|
Florent Kermarrec
|
5830575797
|
logo : add powered by Migen
|
2015-02-17 23:14:21 +01:00 |
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Florent Kermarrec
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79a7f9ecb8
|
create BaseSoC as a basic example design and build UDPSoC/EtherboneSoC on top of it
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2015-02-17 12:37:17 +01:00 |
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Florent Kermarrec
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eeaf03669a
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test: we can now test regs with Etherbone
|
2015-02-17 01:15:06 +01:00 |
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Florent Kermarrec
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a5416fa864
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host: add Etherbone driver
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2015-02-17 01:09:53 +01:00 |
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Florent Kermarrec
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1a3183c15d
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etherbone: fix addressing
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2015-02-17 00:02:49 +01:00 |
|
Florent Kermarrec
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67958f7448
|
mac: fix missing core csr generation
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2015-02-16 14:44:36 +01:00 |
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Florent Kermarrec
|
da13bd536e
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gensoc: add csr_data_width and csr_address_width as parameters In some case we want to have mode than 32 CSR or and csr_data_width != 8
|
2015-02-14 03:24:23 -08:00 |
|
Florent Kermarrec
|
3559de9b4c
|
add setup.py
|
2015-02-14 02:44:39 -08:00 |
|
Florent Kermarrec
|
d3cf2594f2
|
update download instructions
|
2015-02-12 22:03:24 +01:00 |
|
Florent Kermarrec
|
b64dba7a81
|
update download instructions
|
2015-02-12 22:03:04 +01:00 |
|
Florent Kermarrec
|
aedc964908
|
update download instructions
|
2015-02-12 22:02:50 +01:00 |
|
Florent Kermarrec
|
04f7fbd7e2
|
simplify litescope export with do_exit call and remove automatic clean
|
2015-02-12 21:15:51 +01:00 |
|
Florent Kermarrec
|
f8003c92aa
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simplify litescope export with do_exit call and remove automatic clean
|
2015-02-12 21:04:52 +01:00 |
|
Florent Kermarrec
|
4e4800e1b2
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simplify litescope export with do_exit call
|
2015-02-12 21:00:45 +01:00 |
|
Florent Kermarrec
|
61d12a3431
|
fix transport_rx_description (detected with new Migen check)
|
2015-02-12 20:45:15 +01:00 |
|
Florent Kermarrec
|
bceee36ef6
|
etherbone: reads OK on hardware
|
2015-02-12 15:50:07 +01:00 |
|
Florent Kermarrec
|
23c4f5c090
|
etherbone: writes OK on hardware
|
2015-02-12 13:15:30 +01:00 |
|
Florent Kermarrec
|
bfb50e698f
|
etherbone: add more debug signals
|
2015-02-12 12:33:10 +01:00 |
|
Florent Kermarrec
|
0818c29287
|
etherbone: probing OK on hardware
|
2015-02-12 12:17:17 +01:00 |
|
Florent Kermarrec
|
b6aeea676b
|
etherbone: simplify model usage
|
2015-02-12 12:09:39 +01:00 |
|
Florent Kermarrec
|
a2455b19af
|
etherbone: create example design target
|
2015-02-12 11:37:54 +01:00 |
|
Florent Kermarrec
|
f03212a30d
|
cosmetic: define params before payload
|
2015-02-12 11:10:05 +01:00 |
|
Florent Kermarrec
|
9eb2e313e7
|
etherbone_tb: add autocheck
|
2015-02-12 02:00:26 +01:00 |
|
Florent Kermarrec
|
d5887416f1
|
code cleanup
|
2015-02-12 01:30:17 +01:00 |
|
Florent Kermarrec
|
b8f2fc2290
|
move generic modules to generic/__init__.py
|
2015-02-12 01:19:36 +01:00 |
|
Florent Kermarrec
|
e4958ffab3
|
etherbone: cleanup
|
2015-02-12 01:12:52 +01:00 |
|
Florent Kermarrec
|
ea47037570
|
etherbone_tb OK (will need cleanup)
|
2015-02-12 00:01:03 +01:00 |
|
Florent Kermarrec
|
fca89e8b74
|
etherbone: wishbone reads seems OK in simulation
|
2015-02-11 21:51:25 +01:00 |