Sebastien Bourdeauducq
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38e92eb92b
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altera_quartus: fix clock domain name
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2013-03-26 23:05:46 +01:00 |
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Sebastien Bourdeauducq
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3b19dfc412
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Support for platform info
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2013-03-26 19:17:35 +01:00 |
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Sebastien Bourdeauducq
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74cc4d22cd
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generic_platform: remove obj in request + add lookup_request
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2013-03-26 17:56:53 +01:00 |
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Sebastien Bourdeauducq
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003f1950cd
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xilinx_ise: fix clock domain names
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2013-03-23 19:37:16 +01:00 |
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Sebastien Bourdeauducq
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797411c1a9
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generic_platform: do not create clock domains during Verilog conversion
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2013-03-18 18:44:58 +01:00 |
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Sebastien Bourdeauducq
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4bf3190244
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MultiReg: remove idomain
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2013-03-15 19:54:25 +01:00 |
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Sebastien Bourdeauducq
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6feb6e60b0
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New clock_domain API
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2013-03-15 18:46:11 +01:00 |
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Sebastien Bourdeauducq
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001beadb97
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altera_quartus, de0nano: add copyright notices
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2013-03-15 12:37:25 +01:00 |
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Sebastien Bourdeauducq
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f9e07b92a4
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Added platform file for DE0 Nano (by Florent Kermarrec)
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2013-03-15 11:41:38 +01:00 |
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Sebastien Bourdeauducq
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86d6f1d011
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Added support for Altera Quartus (by Florent Kermarrec)
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2013-03-15 11:32:12 +01:00 |
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Sebastien Bourdeauducq
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71c8172836
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xilinx_ise/CRG_SE: reset inversion support
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2013-03-15 11:31:36 +01:00 |
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Sebastien Bourdeauducq
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37d8029848
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CRG: support reset inversion
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2013-03-15 10:49:18 +01:00 |
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Sebastien Bourdeauducq
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24910173b7
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CRG: use new Module API
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2013-03-15 10:48:43 +01:00 |
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Sebastien Bourdeauducq
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c06a821452
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generic_platform: implicit get_fragment
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2013-03-12 16:14:13 +01:00 |
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Sebastien Bourdeauducq
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4d4d6c1f88
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platforms/m1: add video mixer extension board
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2013-03-05 23:03:01 +01:00 |
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Sebastien Bourdeauducq
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6a412f796e
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xilinx_ise: add lock cycle to bitgen
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2013-03-01 11:29:40 +01:00 |
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Sebastien Bourdeauducq
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2b902fdcbd
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xilinx_ise: import Instance
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2013-02-24 15:36:56 +01:00 |
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Sebastien Bourdeauducq
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d60ab1d215
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Use new 'specials' API
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2013-02-24 12:21:01 +01:00 |
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Sebastien Bourdeauducq
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56ae0f0714
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xilinx_ise: disable SRL extraction on synchronizers
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2013-02-23 19:43:12 +01:00 |
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Sebastien Bourdeauducq
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ef833422c7
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generic_platform/get_verilog: pass additional args to verilog.convert
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2013-02-23 19:42:29 +01:00 |
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Sebastien Bourdeauducq
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0321513726
|
corelogic -> genlib
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2013-02-23 19:37:27 +01:00 |
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Sebastien Bourdeauducq
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44ae20d3c4
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generic_platform: prefix subsignals
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2013-02-20 18:27:04 +01:00 |
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Sebastien Bourdeauducq
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244cfbc7a2
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add README, LICENSE and gitignore
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2013-02-15 19:56:44 +01:00 |
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Sebastien Bourdeauducq
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38c3566717
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generic_platform: add name
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2013-02-14 20:02:35 +01:00 |
|
Sebastien Bourdeauducq
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ed4d65f2be
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generic_platform: fix IO signal set when using existing record objects
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2013-02-13 23:29:33 +01:00 |
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Sebastien Bourdeauducq
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feec035cc8
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generic_platform: get absolute path for added sources
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2013-02-12 19:16:00 +01:00 |
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Sebastien Bourdeauducq
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709845e618
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generic_platform: fix request
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2013-02-11 17:54:01 +01:00 |
|
Sebastien Bourdeauducq
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ce6701c6e4
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platforms/m1: norflash_reset -> norflash_rst_n
|
2013-02-11 17:46:27 +01:00 |
|
Sebastien Bourdeauducq
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4b78d90aad
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platforms/m1: add serial pins
|
2013-02-11 17:46:03 +01:00 |
|
Sebastien Bourdeauducq
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f13ad035e1
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Support for command line arguments
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2013-02-08 22:23:58 +01:00 |
|
Sebastien Bourdeauducq
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b092237fa6
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xilinx_ise: support building files without running ISE
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2013-02-08 20:31:45 +01:00 |
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Sebastien Bourdeauducq
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7b8e8a19f3
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Support adding Verilog/VHDL files
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2013-02-08 20:25:20 +01:00 |
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Sebastien Bourdeauducq
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32dcfc6d02
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generic_platform: support name remapping
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2013-02-08 18:27:46 +01:00 |
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Sebastien Bourdeauducq
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9ecfdeccec
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platforms/rhino: add PCA9555 I2C expander
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2013-02-08 17:44:13 +01:00 |
|
Sebastien Bourdeauducq
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fef9d0fc78
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generic_platform: fix typo
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2013-02-08 17:43:04 +01:00 |
|
Sebastien Bourdeauducq
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78f8ec1a53
|
platforms: add M1
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2013-02-08 17:42:35 +01:00 |
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Sebastien Bourdeauducq
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25882c6c83
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platforms: ROACH (incomplete)
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2013-02-07 22:38:33 +01:00 |
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Sebastien Bourdeauducq
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fb5130fc1f
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Initial version
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2013-02-07 22:07:30 +01:00 |