Commit Graph

8079 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 81d35ef85d videomixer: add fb.c 2013-06-14 23:39:48 +02:00
Sebastien Bourdeauducq bb43171274 videomixer: support different resolutions 2013-06-14 23:39:45 +02:00
Sebastien Bourdeauducq ac2cde0e87 asmibus: remove port sharing 2013-06-14 18:34:36 +02:00
Sebastien Bourdeauducq 0c52c08989 bus/asmibus: fix slot aging timer 2013-06-14 17:57:43 +02:00
Sebastien Bourdeauducq df23431d77 framebuffer: work around dysfunctional Xst retiming 2013-06-13 09:41:17 +02:00
Sebastien Bourdeauducq 1ec1fb9ebe bus/lasmibus/Crossbar: support cba_shift=0 2013-06-11 18:15:49 +02:00
Sebastien Bourdeauducq 1c8ef0fe3e dvisampler/dma: buffer full memory words 2013-06-11 18:15:16 +02:00
Sebastien Bourdeauducq ce2f08844a s6ddrphy: fix read latency 2013-06-11 16:02:34 +02:00
Sebastien Bourdeauducq 4d0c80ca1a lasmicon: fix computation of interface latencies 2013-06-11 15:27:05 +02:00
Sebastien Bourdeauducq 422c9a1db9 lasmi: reduce latencies by 1 cycle 2013-06-11 15:26:47 +02:00
Sebastien Bourdeauducq 91d7b656a9 Switch to LASMI, bug pandemonium 2013-06-11 14:18:16 +02:00
Sebastien Bourdeauducq 6f2c05d436 microudp: fix compilation warning 2013-06-11 14:03:39 +02:00
Sebastien Bourdeauducq fe54c68762 lasmi: fix minor problems 2013-06-10 22:49:33 +02:00
Sebastien Bourdeauducq aea3b59432 genlib/fsm: fix handling of zero delayed_enter 2013-06-10 22:49:05 +02:00
Sebastien Bourdeauducq 3a284b9c1e actorlib: LASMI DMA (untested) 2013-06-10 22:29:39 +02:00
Sebastien Bourdeauducq 932bfa7e75 bus: Wishbone -> LASMI bridge (untested) 2013-06-10 18:52:07 +02:00
Sebastien Bourdeauducq 9f560cb758 examples/sim: add LASMI demo 2013-06-09 23:36:51 +02:00
Sebastien Bourdeauducq f2e2397c9d bus/lasmibus: bugfixes 2013-06-09 23:36:32 +02:00
Sebastien Bourdeauducq a836cba790 bus/lasmibus: add target and initiator 2013-06-09 16:03:22 +02:00
Sebastien Bourdeauducq 2948f6a16a examples/sim: rename abstract_transactions to abstract_transactions_wb, use new APIs, remove ASMI 2013-06-09 14:17:30 +02:00
Sebastien Bourdeauducq 35f9f2e9d7 bus/lasmi: interface definition and crossbar (untested) 2013-06-08 15:49:50 +02:00
Kenneth Ryerson 85813b3b58 csr/sram: fix reads on high addresses when word_bits != 0 2013-06-03 21:52:23 +02:00
Kenneth Ryerson e5e3492afe csr/sram: fix page_bits computation 2013-06-03 21:51:44 +02:00
Florent Kermarrec 5c298f406c simplify signals connexion 2013-06-02 15:15:47 +02:00
Sebastien Bourdeauducq 953e603915 xilinx_ise: improve parameter passing 2013-06-01 17:22:57 +02:00
Sebastien Bourdeauducq 45cfdf41fc New simplified flash layout + build flashable images for SoC and videomixer 2013-06-01 17:20:40 +02:00
Sebastien Bourdeauducq cbd621ef2c software/stdlib: fix atoi 2013-05-31 14:44:52 +02:00
Sebastien Bourdeauducq 7c95d253d9 software/videomixer: improve phase calibration 2013-05-30 21:40:16 +02:00
Sebastien Bourdeauducq 30f5ef8895 software/videomixer: remove unneeded DCM resets 2013-05-30 21:39:56 +02:00
Sebastien Bourdeauducq 084aa64a2a dvisampler/clocking: remove DCM_CLKGEN 2013-05-30 21:38:45 +02:00
Sebastien Bourdeauducq 6d71e09281 cif: move to milkymist folder 2013-05-30 21:38:21 +02:00
Sebastien Bourdeauducq cebfe787db genlib/misc: fix import 2013-05-30 18:46:52 +02:00
Sebastien Bourdeauducq ebbd5ebcd2 bus/csr/SRAM: better handling of writes to memories larger than the CSR width 2013-05-30 18:45:04 +02:00
Sebastien Bourdeauducq f0b0942055 bitreverse: fhdl/tools -> genlib/misc 2013-05-30 18:44:37 +02:00
Sebastien Bourdeauducq 548f2685bb platform/rhino: rename ismm data out signal to locked 2013-05-30 11:06:02 +02:00
Sebastien Bourdeauducq b6448ba5fc bios: remove rescue 2013-05-28 16:15:30 +02:00
Sebastien Bourdeauducq 701aac2513 bios/linker.ld: flash -> rom 2013-05-28 16:15:17 +02:00
Sebastien Bourdeauducq fdb021c992 dvisampler: increase frequency of reports to avoid missing WER values 2013-05-28 16:15:00 +02:00
Sebastien Bourdeauducq bac62a32a9 Make memory ports part of specials
This is needed to handle cases where a single memory has ports
in two different modules, and one of these modules is subject
to clock domain remapping. The clock domain of the port in that
module only must be remapped.
2013-05-28 16:11:34 +02:00
Sebastien Bourdeauducq fb3e61230b Use new memory port API 2013-05-28 15:56:14 +02:00
Sebastien Bourdeauducq 759858f739 Use migen.fhdl.std 2013-05-26 18:07:26 +02:00
Sebastien Bourdeauducq c13e573e9f Require Python 3.3 2013-05-26 18:02:18 +02:00
Sebastien Bourdeauducq 70ffe86356 New migen.fhdl.std to simplify imports + len->flen 2013-05-22 17:11:09 +02:00
Sebastien Bourdeauducq 611c4192b1 Use migen.fhdl.std 2013-05-22 17:10:13 +02:00
Sebastien Bourdeauducq 5208baada8 bus/wishbone/SRAM: support init and read_only 2013-05-19 20:53:54 +02:00
Sebastien Bourdeauducq 7ada0159fd bus/csr/SRAM: support init 2013-05-19 20:53:37 +02:00
Sebastien Bourdeauducq e272e68fac platforms/papilio_pro: swap tx/rx to be consistent with M1 2013-05-19 20:24:47 +02:00
Sebastien Bourdeauducq 3eb41f73e6 Simplify system ID 2013-05-19 19:44:00 +02:00
Sebastien Bourdeauducq d487dc607f software: add nofloat libbase for size-optimized binaries 2013-05-19 12:41:40 +02:00
Sebastien Bourdeauducq fb6cd481f0 dvisampler: report the word error rate 2013-05-16 22:38:55 +02:00