Sebastien Bourdeauducq
65eeb33329
Revert "add I/O standard definitions to mibuild/altera"
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This reverts commit a889b41060
2015-04-20 16:22:32 +08:00
Alain Péteut
a889b41060
add I/O standard definitions to mibuild/altera
2015-04-20 10:08:47 +02:00
Alain Péteut
1b050d98ea
add differential in/out support to mibuild/altera
2015-04-20 10:08:26 +02:00
Alain Péteut
fd966d70ba
some PEP8 cosmetic
2015-04-20 10:03:08 +02:00
Florent Kermarrec
15625236c1
platforms/kc705: add PCIe pins
2015-04-17 00:51:16 +02:00
Florent Kermarrec
083d371af4
mibuild: add support for libraries, move .replace("\\", "/") to generic_platform.py and execute it only on Windows machines.
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We need to support libraries when Migen is used as a wrapper on large VHDL designs using libraries.
2015-04-17 00:11:31 +02:00
Florent Kermarrec
482486706c
mibuild/lattice: adapt diamond to last Migen changes
2015-04-13 21:40:58 +02:00
Florent Kermarrec
d83e170872
global: more pep8
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we will have to continue the work... volunteers are welcome :)
2015-04-13 21:33:44 +02:00
Florent Kermarrec
89bb90fe2a
global: pep8 (E265)
2015-04-13 21:22:46 +02:00
Florent Kermarrec
f97d7ff44c
global: pep8 (E261, E271)
2015-04-13 21:21:30 +02:00
Florent Kermarrec
5f225c0475
global: pep8 (E225)
2015-04-13 21:11:13 +02:00
Florent Kermarrec
728c15213f
global: pep8 (E222)
2015-04-13 20:55:21 +02:00
Florent Kermarrec
69764f2e22
global: pep8 (E401)
2015-04-13 20:54:19 +02:00
Florent Kermarrec
37ef9b6f3a
global: pep8 (E231)
2015-04-13 20:50:03 +02:00
Florent Kermarrec
1051878f4c
global: pep8 (E302)
2015-04-13 20:45:35 +02:00
Florent Kermarrec
17e5249be0
global: pep8 (replace tabs with spaces)
2015-04-13 20:07:07 +02:00
Sebastien Bourdeauducq
e1702c422c
introduce conversion output object (prevents file IO in FHDL backends)
2015-04-08 20:28:23 +08:00
Sebastien Bourdeauducq
8ce683964a
mibuild/tools/write_to_file: use context manager
2015-04-08 19:41:54 +08:00
Robert Jordens
aac953dd90
vivado: support phys_opt
2015-04-04 19:00:22 +08:00
Robert Jordens
9506f69390
vivado: add support for pre_synthesis_commands
2015-04-04 19:00:01 +08:00
Robert Jordens
4522956f11
vivado: make _build_files() a method and rename
2015-04-04 18:59:50 +08:00
Sebastien Bourdeauducq
1d1189506a
mibuild: support multiple specifications of include file and sources
2015-04-04 18:58:02 +08:00
Yann Sionneau
ce429841d5
kc705: fix typo in platform file (LPC definition)
2015-04-02 20:21:20 +08:00
Sebastien Bourdeauducq
c169f0b189
Revert "migen: create VerilogConvert and EDIFConvert classes and return it with convert functions"
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This reverts commit f03aa76292
2015-03-30 19:41:16 +08:00
Florent Kermarrec
15e24b6c10
mibuild/platforms: fix minispartan6
2015-03-30 11:42:14 +02:00
Florent Kermarrec
f03aa76292
migen: create VerilogConvert and EDIFConvert classes and return it with convert functions
2015-03-30 11:37:55 +02:00
Sebastien Bourdeauducq
21c5fb6f6c
Merge branch 'master' of github.com:m-labs/migen
2015-03-30 00:52:15 +08:00
Sebastien Bourdeauducq
19a6157478
platforms/lx9_microboard,usrp_b100: fix bitgen opts
2015-03-30 00:44:56 +08:00
Florent Kermarrec
263fc47728
platforms/kc705: fix .bin generation with ISE and Vivado
2015-03-29 21:15:20 +08:00
Florent Kermarrec
17f3590a7c
platforms/kc705: add iMPACT programmer
2015-03-29 12:15:39 +02:00
Florent Kermarrec
ec080479da
mibuild/sim: use the same architecture we use for others backends
2015-03-27 14:14:49 +01:00
Florent Kermarrec
de31103cce
platforms/minispartan6: add ftdi_fifo pins
2015-03-22 11:20:22 +01:00
Florent Kermarrec
200979fb81
platforms/minispartan6: fix IOStandard/Slew, add FpgaProg programmer, change default clock to 32MHz
2015-03-22 03:37:27 +01:00
Florent Kermarrec
7440ccd65b
mibuild/xilinx/programmer: add iMPACT programmer (for sb: I need it in Windows for now since I was not able to get XC3SPROG working)
2015-03-21 20:27:11 +01:00
Florent Kermarrec
1d2e7e8390
mibuild/platforms/minispartan6: adapt to recent changes (able to build simple example)
2015-03-21 18:31:50 +01:00
Florent Kermarrec
78b4f313bf
mibuild/platforms/minispartan6: add device parameter (board can be populated with lx9 or lx25)
2015-03-21 18:28:09 +01:00
Florent Kermarrec
1a03c340c9
mibuild/platforms: review and fix small mistakes
2015-03-21 18:23:35 +01:00
Florent Kermarrec
3a38626556
mibuild/platforms: add minispartan6 (from Matt O'Gorman)
2015-03-21 18:22:26 +01:00
Robert Jordens
4fe888702d
pipistrello: switch is a button
2015-03-19 18:56:49 +01:00
Robert Jordens
47ea451315
pipistrello: compress and load bitstream at 6MHz
2015-03-19 18:48:45 +01:00
Robert Jordens
860b72c8b6
pipistrello: rename sdram->ddram
2015-03-19 18:48:22 +01:00
Florent Kermarrec
3aee58f484
mibuild/lattice/diamond: add verilog include path (thanks Lattice's FAE since it's not documented)
2015-03-18 18:54:22 +01:00
Florent Kermarrec
ea9c1b8e69
fhdl/verilog: revert "fhdl/verilog: add simulation parameter to avoid simulation tricks in synthetizable code"
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This probably breaks simulation with Icarus Verilog (and others simulators?)
2015-03-18 14:59:22 +01:00
Florent Kermarrec
500e58ce7d
mibuild/platform/versa: fix clock_constraints
2015-03-17 15:25:10 +01:00
Florent Kermarrec
e07b7f632c
mibuild/lattice: use ODDRXD1 and new synthesis directive
2015-03-17 14:59:36 +01:00
Florent Kermarrec
022ac26c22
mibuild/lattice: add LatticeAsyncResetSynchronizer
2015-03-17 12:42:36 +01:00
Florent Kermarrec
c06ab82f13
mibuild/platforms/versa: add ethernet clock constraints
2015-03-17 12:04:00 +01:00
Florent Kermarrec
ba2aeb08be
mibuild/platforms/versa: add rst_n
2015-03-17 11:51:34 +01:00
Florent Kermarrec
6dd8d89c6c
mibuild/lattice: fix LatticeDDROutput
2015-03-17 09:40:25 +01:00
Florent Kermarrec
9adf3f02f2
fhdl/verilog: add simulation parameter to avoid simulation tricks in synthetizable code
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it's generally better to have identical code between simulations and synthesis, but here tricks inserted for simulation are clearly expected to be simplified by synthesis tools, so it's better not inserting them.
2015-03-17 00:40:26 +01:00
