Florent Kermarrec
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6b93849a08
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gensoc: parameter check is now more restrictive, add additional info to help user
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2015-02-28 03:12:00 +01:00 |
Florent Kermarrec
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8e04ef7b95
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test minicon with de0nano (OK) and fix missing self in gensoc
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2015-02-27 20:00:16 +01:00 |
Florent Kermarrec
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f1200d6388
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gensoc: move I/O for rom initialization to make.py
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2015-02-27 19:48:07 +01:00 |
Florent Kermarrec
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e07e124118
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sdram: import dfi, lasmibus, wishbone2lasmi from Migen in sdram/bus dir
We will maybe move things, but at least it's in MiSoC now
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2015-02-27 17:07:44 +01:00 |
Florent Kermarrec
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07b9cabd0d
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gensoc: make it more generic (a SoC does not necessarily have a CPU)
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2015-02-27 16:39:00 +01:00 |
Florent Kermarrec
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be0eb8d265
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use cachesize reported in wishbone2lasmi
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2015-02-27 14:13:38 +01:00 |
Florent Kermarrec
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9814001c79
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create cpu dir and move lm32/mor1kx in it
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2015-02-27 10:51:03 +01:00 |
Florent Kermarrec
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9f636f7985
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move memtest to sdram
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2015-02-27 10:47:54 +01:00 |
Florent Kermarrec
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77a6f580e2
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gensoc: add check_cpu_memory_region and check_csr_region to detect csr and mem regions conflicts
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2015-02-27 10:23:02 +01:00 |
Robert Jordens
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c9ed38dec8
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gensoc: missing self.
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2015-02-26 21:32:11 -07:00 |
Florent Kermarrec
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09fbbca53e
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gensoc: cpus now directly add their verilog sources
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2015-02-26 20:49:21 +01:00 |
Florent Kermarrec
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5e8a0c496d
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gensoc: add mem_map and mem_decoder to avoid duplications
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2015-02-26 20:12:27 +01:00 |
Florent Kermarrec
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5ac5ffe359
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gensoc: get platform_id from platform
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2015-02-26 19:07:19 +01:00 |
Florent Kermarrec
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5500c41915
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move lm32/mor1kx submodules to extcores
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2015-02-18 10:39:18 -07:00 |
Florent Kermarrec
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4c9554b65c
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gensoc: call do_exit after SoC is built
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2015-02-18 10:38:14 -07:00 |
Florent Kermarrec
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da13bd536e
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gensoc: add csr_data_width and csr_address_width as parameters In some case we want to have mode than 32 CSR or and csr_data_width != 8
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2015-02-14 03:24:23 -08:00 |
Sebastien Bourdeauducq
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aac34f011f
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gensoc: support user-defined CSR regions
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2014-11-30 22:29:26 +08:00 |
Sebastien Bourdeauducq
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8ae3a00a94
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gensoc: simplify WB address decoding
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2014-11-30 22:05:51 +08:00 |
Sebastien Bourdeauducq
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bab6bb7c4a
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gensoc: fix align
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2014-11-27 23:05:36 +08:00 |
Sebastien Bourdeauducq
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8418ccafdc
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minicon: remove unused signals and fix indent
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2014-11-27 22:12:05 +08:00 |
Yann Sionneau
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cf92821fcf
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Refactor directory hierarchy of sdram phys and controllers
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2014-11-27 22:09:10 +08:00 |
Yann Sionneau
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f33b285af1
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Minicon: small SDRAM controller
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2014-11-27 22:09:03 +08:00 |
Florent Kermarrec
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34ed315a48
|
remove trailing whitespaces
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2014-10-17 17:14:40 +08:00 |
Sebastien Bourdeauducq
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efb2466c7e
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gensoc: add id for KC705
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2014-08-06 23:53:51 +08:00 |
Florent Kermarrec
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d1ff43faa7
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gensoc/cpuif: do not generate access functions for registers > 64 bits
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2014-08-04 22:38:19 +08:00 |
Florent Kermarrec
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d4833cb3dc
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cpuif: remove limitations on csr data_width
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2014-06-28 17:39:55 +02:00 |
Sebastien Bourdeauducq
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1c08aeb21c
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Initial mor1kx (OpenRISC) support
Based on milkymist-ng-mor1kx by Stefan Kristiansson
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2014-05-14 10:24:56 +02:00 |
Sebastien Bourdeauducq
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9e784fc82c
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Generate mem.h from SoC description
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2014-02-21 17:55:05 +01:00 |
Sebastien Bourdeauducq
|
ad974a07ef
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gensoc: support for user-defined UART and add default values for SRAM and L2 sizes
|
2014-01-06 22:12:42 +01:00 |
Sebastien Bourdeauducq
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c95b9d6d76
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gensoc: use add_verilog_include_path
|
2013-12-12 23:17:16 +01:00 |
Sebastien Bourdeauducq
|
96600ad9d7
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set LM32 reset address
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2013-11-25 12:09:16 +01:00 |
Sebastien Bourdeauducq
|
7459a849ee
|
IntegratedBIOS: read only
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2013-11-25 10:25:05 +01:00 |
Sebastien Bourdeauducq
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78cd7a288e
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move integrated BIOS code to gensoc
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2013-11-25 10:22:14 +01:00 |
Sebastien Bourdeauducq
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b212e0279d
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gensoc: add Papilio Pro ID
|
2013-11-24 23:50:33 +01:00 |
Sebastien Bourdeauducq
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257185cc9c
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rename create_sdram_modules and add register_rom
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2013-11-24 20:16:19 +01:00 |
Sebastien Bourdeauducq
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fca0b968e7
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generate linker memory map, move all generated files into the same folder
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2013-11-24 19:50:17 +01:00 |
Sebastien Bourdeauducq
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fdff1ae5f8
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make build system more generic
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2013-11-24 13:37:32 +01:00 |
Sebastien Bourdeauducq
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4a3a1d02e9
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modularize SoC integration
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2013-11-24 10:30:02 +01:00 |