Commit Graph

38 Commits

Author SHA1 Message Date
Florent Kermarrec 6b93849a08 gensoc: parameter check is now more restrictive, add additional info to help user 2015-02-28 03:12:00 +01:00
Florent Kermarrec 8e04ef7b95 test minicon with de0nano (OK) and fix missing self in gensoc 2015-02-27 20:00:16 +01:00
Florent Kermarrec f1200d6388 gensoc: move I/O for rom initialization to make.py 2015-02-27 19:48:07 +01:00
Florent Kermarrec e07e124118 sdram: import dfi, lasmibus, wishbone2lasmi from Migen in sdram/bus dir
We will maybe move things, but at least it's in MiSoC now
2015-02-27 17:07:44 +01:00
Florent Kermarrec 07b9cabd0d gensoc: make it more generic (a SoC does not necessarily have a CPU) 2015-02-27 16:39:00 +01:00
Florent Kermarrec be0eb8d265 use cachesize reported in wishbone2lasmi 2015-02-27 14:13:38 +01:00
Florent Kermarrec 9814001c79 create cpu dir and move lm32/mor1kx in it 2015-02-27 10:51:03 +01:00
Florent Kermarrec 9f636f7985 move memtest to sdram 2015-02-27 10:47:54 +01:00
Florent Kermarrec 77a6f580e2 gensoc: add check_cpu_memory_region and check_csr_region to detect csr and mem regions conflicts 2015-02-27 10:23:02 +01:00
Robert Jordens c9ed38dec8 gensoc: missing self. 2015-02-26 21:32:11 -07:00
Florent Kermarrec 09fbbca53e gensoc: cpus now directly add their verilog sources 2015-02-26 20:49:21 +01:00
Florent Kermarrec 5e8a0c496d gensoc: add mem_map and mem_decoder to avoid duplications 2015-02-26 20:12:27 +01:00
Florent Kermarrec 5ac5ffe359 gensoc: get platform_id from platform 2015-02-26 19:07:19 +01:00
Florent Kermarrec 5500c41915 move lm32/mor1kx submodules to extcores 2015-02-18 10:39:18 -07:00
Florent Kermarrec 4c9554b65c gensoc: call do_exit after SoC is built 2015-02-18 10:38:14 -07:00
Florent Kermarrec da13bd536e gensoc: add csr_data_width and csr_address_width as parameters In some case we want to have mode than 32 CSR or and csr_data_width != 8 2015-02-14 03:24:23 -08:00
Sebastien Bourdeauducq aac34f011f gensoc: support user-defined CSR regions 2014-11-30 22:29:26 +08:00
Sebastien Bourdeauducq 8ae3a00a94 gensoc: simplify WB address decoding 2014-11-30 22:05:51 +08:00
Sebastien Bourdeauducq bab6bb7c4a gensoc: fix align 2014-11-27 23:05:36 +08:00
Sebastien Bourdeauducq 8418ccafdc minicon: remove unused signals and fix indent 2014-11-27 22:12:05 +08:00
Yann Sionneau cf92821fcf Refactor directory hierarchy of sdram phys and controllers 2014-11-27 22:09:10 +08:00
Yann Sionneau f33b285af1 Minicon: small SDRAM controller 2014-11-27 22:09:03 +08:00
Florent Kermarrec 34ed315a48 remove trailing whitespaces 2014-10-17 17:14:40 +08:00
Sebastien Bourdeauducq efb2466c7e gensoc: add id for KC705 2014-08-06 23:53:51 +08:00
Florent Kermarrec d1ff43faa7 gensoc/cpuif: do not generate access functions for registers > 64 bits 2014-08-04 22:38:19 +08:00
Florent Kermarrec d4833cb3dc cpuif: remove limitations on csr data_width 2014-06-28 17:39:55 +02:00
Sebastien Bourdeauducq 1c08aeb21c Initial mor1kx (OpenRISC) support
Based on milkymist-ng-mor1kx by Stefan Kristiansson
2014-05-14 10:24:56 +02:00
Sebastien Bourdeauducq 9e784fc82c Generate mem.h from SoC description 2014-02-21 17:55:05 +01:00
Sebastien Bourdeauducq ad974a07ef gensoc: support for user-defined UART and add default values for SRAM and L2 sizes 2014-01-06 22:12:42 +01:00
Sebastien Bourdeauducq c95b9d6d76 gensoc: use add_verilog_include_path 2013-12-12 23:17:16 +01:00
Sebastien Bourdeauducq 96600ad9d7 set LM32 reset address 2013-11-25 12:09:16 +01:00
Sebastien Bourdeauducq 7459a849ee IntegratedBIOS: read only 2013-11-25 10:25:05 +01:00
Sebastien Bourdeauducq 78cd7a288e move integrated BIOS code to gensoc 2013-11-25 10:22:14 +01:00
Sebastien Bourdeauducq b212e0279d gensoc: add Papilio Pro ID 2013-11-24 23:50:33 +01:00
Sebastien Bourdeauducq 257185cc9c rename create_sdram_modules and add register_rom 2013-11-24 20:16:19 +01:00
Sebastien Bourdeauducq fca0b968e7 generate linker memory map, move all generated files into the same folder 2013-11-24 19:50:17 +01:00
Sebastien Bourdeauducq fdff1ae5f8 make build system more generic 2013-11-24 13:37:32 +01:00
Sebastien Bourdeauducq 4a3a1d02e9 modularize SoC integration 2013-11-24 10:30:02 +01:00