Sebastien Bourdeauducq
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037625886d
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dvisampler: decoding
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2013-03-22 21:28:17 +01:00 |
Sebastien Bourdeauducq
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d65941d6cc
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dvisampler: channel synchronization
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2013-03-22 18:37:10 +01:00 |
Florent Kermarrec
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99a78b8e33
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clean up
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2013-03-22 14:01:38 +01:00 |
Florent Kermarrec
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5e48f9c005
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update driver api
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2013-03-22 12:35:12 +01:00 |
Florent Kermarrec
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b1cbfe2326
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clean up/fixes
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2013-03-22 11:31:21 +01:00 |
Sebastien Bourdeauducq
|
515cdb2bd8
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dvisampler: character synchronization
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2013-03-21 22:56:13 +01:00 |
Sebastien Bourdeauducq
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7c4ca4fd66
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dvisampler/datacapture: deserialize to 10 bits
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2013-03-21 19:06:15 +01:00 |
Sebastien Bourdeauducq
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fa2331e084
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dvisampler/clocking: generate pix reset
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2013-03-21 19:02:04 +01:00 |
Sebastien Bourdeauducq
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2315544b36
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software/videomixer: quick hack for phase detection
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2013-03-21 15:32:26 +01:00 |
Florent Kermarrec
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db1ceccca1
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fix uart2Csr and update miio example
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2013-03-21 12:18:04 +01:00 |
Sebastien Bourdeauducq
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a6a3d93059
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software: add videomixer base files
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2013-03-21 10:42:31 +01:00 |
Sebastien Bourdeauducq
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bb566c9e7c
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software/bios: change boot order
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2013-03-21 10:41:56 +01:00 |
Sebastien Bourdeauducq
|
0a14c3714b
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dvisampler: software controlled phase detector
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2013-03-21 00:46:29 +01:00 |
Florent Kermarrec
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24211574ec
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update de0nano example/ remove de1 (wip)
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2013-03-18 23:03:52 +01:00 |
Florent Kermarrec
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36f3556028
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Add uart2csr
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2013-03-18 21:45:07 +01:00 |
Sebastien Bourdeauducq
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28cb97068c
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dvisampler/clocking: proper pix5x reset synchronization
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2013-03-18 20:31:59 +01:00 |
Sebastien Bourdeauducq
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5126f616fb
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dvisampler: use pix5x as IODELAY clock
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2013-03-18 19:03:17 +01:00 |
Sebastien Bourdeauducq
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48aae9bee5
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Use Instance.Input(..., ClockSignal/ResetSignal) instead of Instance.ClockPort/ResetPort
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2013-03-18 17:44:01 +01:00 |
Sebastien Bourdeauducq
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0c0140a8fb
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m1crg: set CLKIN_PERIOD for vga_clock_gen
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2013-03-17 20:16:58 +01:00 |
Sebastien Bourdeauducq
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74cc045ee1
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dvisampler/datacapture: connect IODELAY IOCLK0
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2013-03-17 17:42:22 +01:00 |
Sebastien Bourdeauducq
|
621526fb7d
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dvisampler/datacapture: fix tap counter reg
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2013-03-17 17:36:49 +01:00 |
Sebastien Bourdeauducq
|
3a0cf278fd
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dvisampler: fixes
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2013-03-17 15:41:50 +01:00 |
Sebastien Bourdeauducq
|
9f02ced39e
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dvisampler: add clocking and phase detector
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2013-03-17 14:43:10 +01:00 |
Sebastien Bourdeauducq
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0168f83523
|
MultiReg: remove idomain
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2013-03-15 19:51:29 +01:00 |
Sebastien Bourdeauducq
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b2173bba9f
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Use new ClockDomain API
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2013-03-15 19:17:05 +01:00 |
Sebastien Bourdeauducq
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2ae504fb9b
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software/bios: default length 4 for mr command
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2013-03-13 19:59:39 +01:00 |
Sebastien Bourdeauducq
|
eaef3464e9
|
Instantiate DVI sampler core for both ports
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2013-03-13 19:56:56 +01:00 |
Sebastien Bourdeauducq
|
e99bafe52b
|
dvisampler: add core, EDID support
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2013-03-13 19:56:26 +01:00 |
Sebastien Bourdeauducq
|
1e7783a41e
|
build.py: use implicit get_fragment
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2013-03-12 16:13:20 +01:00 |
Sebastien Bourdeauducq
|
a23df42a7a
|
Use automatic register naming
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2013-03-12 15:47:54 +01:00 |
Florent Kermarrec
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60e2cdfe79
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get_registers --> get_registers_glue since it's conflicting with new Migen register automatic detection
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2013-03-11 20:05:30 +01:00 |
Sebastien Bourdeauducq
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a9b723568a
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Use new module, autoreg and eventmanager Migen APIs
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2013-03-10 19:32:38 +01:00 |
Sebastien Bourdeauducq
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2059592db2
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software/libcompiler-rt: add ctzsi2
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2013-03-06 11:10:16 +01:00 |
Florent Kermarrec
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edce543b14
|
adapt to migen changes
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2013-03-01 01:09:00 +01:00 |
Florent Kermarrec
|
80e9db7e61
|
use mibuild for de1 example
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2013-02-28 23:11:41 +01:00 |
Florent Kermarrec
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58a6acba27
|
use mibuild for de0_nano example
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2013-02-28 23:02:06 +01:00 |
Florent Kermarrec
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58edd7632c
|
compiles but untested
|
2013-02-28 00:32:42 +01:00 |
Florent Kermarrec
|
5accd48a17
|
doc: update
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2013-02-26 23:45:01 +01:00 |
Florent Kermarrec
|
87336128a3
|
sim: update
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2013-02-26 23:25:10 +01:00 |
Florent Kermarrec
|
ae900c9c16
|
examples: use miscope.bridges
|
2013-02-26 23:20:29 +01:00 |
Florent Kermarrec
|
5fc89f0c71
|
move spi2csr to briges/spi2csr
|
2013-02-26 23:17:34 +01:00 |
Florent Kermarrec
|
f823d06cf1
|
examples: update & simplify
|
2013-02-26 23:14:09 +01:00 |
Florent Kermarrec
|
b3ae31ee2f
|
examples/../top: update
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2013-02-26 23:00:37 +01:00 |
Sebastien Bourdeauducq
|
356416fcdc
|
lm32: update
|
2013-02-24 17:42:28 +01:00 |
Sebastien Bourdeauducq
|
70f4c74d46
|
m1crg: advance off-chip DDR clock phase
|
2013-02-24 17:41:56 +01:00 |
Sebastien Bourdeauducq
|
5e6505b946
|
bios: print number of memory errors
|
2013-02-24 16:51:03 +01:00 |
Sebastien Bourdeauducq
|
b854f1ad32
|
build: support optional MMU
|
2013-02-24 16:28:59 +01:00 |
Sebastien Bourdeauducq
|
43343b131f
|
lm32: use submodule
|
2013-02-24 15:57:19 +01:00 |
Sebastien Bourdeauducq
|
0caac2246d
|
Use new 'specials' API
|
2013-02-24 13:07:25 +01:00 |
Sebastien Bourdeauducq
|
a22ada36d7
|
corelogic -> genlib
|
2013-02-24 12:31:00 +01:00 |