Commit Graph

8225 Commits

Author SHA1 Message Date
enjoy-digital 8159b5caad
Merge pull request #1412 from umarcor/umarcor/f4pga
litex/build/xilinx/f4pga: update imports
2022-09-02 19:03:02 +02:00
umarcor 7f17866386 litex/build/xilinx/f4pga: update imports
Signed-off-by: umarcor <umartinezcorral@antmicro.com>
2022-09-02 15:48:22 +02:00
Florent Kermarrec 153182a014 cores/dna: Fix typo. 2022-09-02 13:09:40 +02:00
Florent Kermarrec 4426e61899 soc/add_pcie: Expose with_synchronizer parameter. 2022-09-01 17:47:27 +02:00
Florent Kermarrec b24d744f8e cores/dna: Rewrite/simplify core and use a slower clock (sys_clk/16). 2022-09-01 14:24:01 +02:00
Florent Kermarrec 1c4d64f46b CHANGES: Update. 2022-09-01 11:22:25 +02:00
Florent Kermarrec c0d3775dcd integration/builder: Simplify bios_console. 2022-08-31 12:10:15 +02:00
Florent Kermarrec aec02b395d integration/builder: Add default bios_console value. 2022-08-31 10:33:26 +02:00
Florent Kermarrec 35afd59956 tools/litex_server/litex_client: Add initial information exchange and improve PCIe case.
Due to the address translation done with the LitePCIe bridge (remapping CSR to 0), RemoteClient
needs to know which bridge is used to also translate CSRs.

This commit adds an initial information exchange between server and client and avoid the PCIe workarounds.
2022-08-30 18:54:03 +02:00
enjoy-digital ea8ba57eab
Merge pull request #1410 from trabucayre/improve_connectors
Improve connectors
2022-08-30 15:34:55 +02:00
Gwenhael Goavec-Merou fc0f0be679 build/generic_platform/ConnectorManager: allows to search recursively pins through connectors dictionary 2022-08-29 20:27:41 +02:00
Gwenhael Goavec-Merou d3368d7fab build/generic_platform: allows to dynamically extends connectors dictionary 2022-08-29 20:25:39 +02:00
Florent Kermarrec ece86a7673 integration/software: Remane BIOS console options/flags. 2022-08-29 19:47:08 +02:00
Florent Kermarrec 6f5412e9d0 bios/main: Change no console message display. 2022-08-29 19:31:41 +02:00
Florent Kermarrec 8b8dba658c integration/builder: Rename exposed bios-console values. 2022-08-29 19:26:29 +02:00
Florent Kermarrec f842481a2d integration/builder: Rename --lto argument to --bios-lto and create BIOS group. 2022-08-29 19:01:55 +02:00
enjoy-digital e2a3cd57bf
Merge pull request #1409 from cklarhorst/bios_no_console
integration/builder: Make bios console configurable + add no console option
2022-08-29 18:51:31 +02:00
Christian Klarhorst 9e4df3c1d2 integration/builder Add no bios console option
This allows to deactivate the cmd_handlers and the serial parsing code to reduce the bios size.
2022-08-29 10:55:39 +02:00
Christian Klarhorst b010455415 integration/builder Make bios console configurable 2022-08-29 10:40:31 +02:00
enjoy-digital 50a5e137ff
Merge pull request #1405 from jrudolph/better-meson-error-msg
soc/integration/builder: more precise error message when meson is too old
2022-08-24 19:36:23 +02:00
Johannes Rudolph 64e5de9fc8
soc/integration/builder: more precise error message when meson is too old 2022-08-23 19:02:41 +02:00
Gabriel Somlo 01754a82c8 integration/soc: fix sata irq initialization
The first argument to `self.irq.add()` should match the name of the
`EventManager()` object being added, i.e., "sata_irq" rather than
just plain "sata". This is necessary for interrupt signals to be
asserted as intended.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2022-08-19 14:37:22 -04:00
Dolu1990 78a1dbbc8b
Merge pull request #1402 from enjoy-digital/naxriscv-merge
cpu/NaxRiscv fix LSU deadlock
2022-08-18 17:32:16 +02:00
Dolu1990 89522f6980 cpu/NaxRiscv fix LSU deadlock 2022-08-18 10:36:19 +02:00
Tim 'mithro' Ansell 33ae301d0d
Merge pull request #1395 from lschuermann/dev/missing-cpus-manifest
Add missing soc/cores/cpu directories to MANIFEST.in
2022-08-10 09:57:53 -07:00
Leon Schuermann 727cc40ab1 Add missing soc/cores/cpu directories to MANIFEST.in 2022-08-09 20:30:04 +02:00
Dolu1990 552d7bdb5c cpu/NaxRiscv: update 2022-08-08 10:53:06 +02:00
Dolu1990 ec4c8741d4 cpu/NaxRiscv: update 2022-08-08 10:51:23 +02:00
enjoy-digital c4e635ea5c
Merge pull request #1393 from trabucayre/fix_vivado_yosys_synth
build/xilinx/vivado: Insert the yosys call into script_content only when synth_mode == yosys
2022-08-05 17:30:14 +02:00
Florent Kermarrec b792bfd8b2 tools/litex_client/run_gui: Add Identifier/Leds/Buttons peripherals support. 2022-08-05 15:25:13 +02:00
Gwenhael Goavec-Merou ae44b70833 build/xilinx/vivado: Insert the yosys call into script_content only when synth_mode == yosys 2022-08-05 14:51:39 +02:00
Florent Kermarrec 95a4814184 tools/litex_client: Improve run_gui termination. 2022-08-05 14:12:37 +02:00
Florent Kermarrec 68006a2144 tools/litex_client: Add XADC (7-Series) suppport to GUI. 2022-08-05 13:49:26 +02:00
Florent Kermarrec ae8deda186 interconnect/axi/AXIArbiter: valid also needs to be filtered.
Fixes un-sollicited valids on masters.
2022-08-05 11:20:52 +02:00
Florent Kermarrec a286d77e01 build/xilinx/vivado: Switch from .format to f-strings. 2022-08-05 08:59:32 +02:00
Florent Kermarrec 2fba07daf8 build/gowin: Use build_name instead of top for generated files. 2022-08-05 08:30:34 +02:00
Florent Kermarrec 3c1e8e74fc build: Cosmetic cleanups. 2022-08-05 08:22:36 +02:00
enjoy-digital c2b62a6b0c
Merge pull request #1392 from tpwrules/fix-vexriscsmp-quartus
cores/cpu/vexriscv_smp: define SYNTHESIS in Quartus
2022-08-05 08:02:29 +02:00
enjoy-digital 1f2d0e120b
Merge pull request #1391 from dlobato/fix-verilator-fst-trace
build/sim/verilator: fixed missing placeholder
2022-08-05 08:02:08 +02:00
Thomas Watson 195cc915ed cores/cpu/vexriscv_smp: define SYNTHESIS in Quartus 2022-08-04 21:34:56 -05:00
David Lobato 41e1ccce4b build/sim/verilator: fixed missing placeholder 2022-08-04 20:03:29 +01:00
Florent Kermarrec 926fb9a30a build/xilinx/vivado: Fix build. 2022-08-04 17:59:12 +02:00
Florent Kermarrec 47df2f6983 bios/cmd_bios: Add buttons command to get buttons value. 2022-08-04 16:31:12 +02:00
enjoy-digital 8250f56f80
Merge pull request #1389 from trabucayre/rfc_yosys_nextpnr_wrapper
RFC: yosys nextpnr wrapper
2022-08-04 15:02:35 +02:00
Dolu1990 1ce378e24d
Merge pull request #1390 from tpwrules/add-linux-vexriscv_smp
cores/cpu/vexriscv_smp: add default cores used by linux with l2 cache
2022-08-04 12:19:37 +02:00
Mateusz Hołenko 6932fc51e2
Merge pull request #1388 from p-woj/json2renode-fb-plic
tools/litex_json2renode: Add video_framebuffer support, vexriscv interrupt fixes
2022-08-02 15:35:06 +02:00
Thomas Watson 35e0de043d cores/cpu/vexriscv_smp: add default cores used by linux with l2 cache 2022-07-31 22:31:33 -05:00
Florent Kermarrec 7789e1875a build/gowin: Fix build regression (build_name -> self._build_name). 2022-07-26 09:59:20 +02:00
Gwenhael Goavec-Merou d5b0f9263d build: lattice/radiant.py xilinx/common.py xilinx/ise.py xilinx/vivado.py: use yosys_wrapper 2022-07-25 22:35:55 +02:00
Gwenhael Goavec-Merou 21105669a8 build: lattice/icestorm, lattice/oxide, lattice/trellis, xilinx/yosys_nextpnr: inherits from YosysNextPNRToolchain 2022-07-25 22:05:21 +02:00