Florent Kermarrec
8ac3fbc039
soc/cores/led: Split LED-SHIFT in LED-READ/LED-SHIFT, simplify and fix off by one error.
2021-12-27 14:06:04 +01:00
enjoy-digital
2c68135eb4
Merge pull request #1143 from enjoy-digital/Dolu1990-patch-1
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tools/litex_json2dts_linux.py fix double {{
2021-12-27 12:34:19 +01:00
Dolu1990
f4967cfb85
tools/litex_json2dts_linux.py fix double {{
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A string with a {{ was missing the .format call, generating some broken dts
2021-12-26 12:17:33 +01:00
enjoy-digital
d36e1b60bd
Merge pull request #1139 from tilk/jtagbone_typo
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Fix typo jtabone -> jtagbone
2021-12-21 19:22:01 +01:00
Marek Materzok
92c8f7dc7c
Fix typo jtabone -> jtagbone
2021-12-21 18:10:12 +01:00
enjoy-digital
72126f90a0
Merge pull request #1138 from fjullien/efinix_add_ifacewriter_mipi_clkin
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efinix: add gpio MIPI_CLKIN to ifacewriter
2021-12-21 15:34:51 +01:00
enjoy-digital
1a9716048f
Merge pull request #1136 from antmicro/fix-regions-filter
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tools/litex_json2renode: Add more restrictions to memory regions filter
2021-12-21 15:34:25 +01:00
Franck Jullien
2174a9219b
efinix: add gpio MIPI_CLKIN to ifacewriter
2021-12-21 12:39:22 +01:00
enjoy-digital
55268af279
Merge pull request #1129 from gsomlo/gls-json2dts-update
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clock, mmc updates for json2dts_linux
2021-12-20 21:27:06 +01:00
enjoy-digital
9e44e856cc
Merge pull request #1137 from trabucayre/zynq_tcl_preset
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zynq7000: add TCL preset support
2021-12-20 21:25:40 +01:00
enjoy-digital
58f9bce567
Merge pull request #1135 from fjullien/bios_add_variable_size_mem_write
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bios: add write size option to cmd mem_write
2021-12-20 21:23:16 +01:00
Gwenhael Goavec-Merou
14e0aeb92a
zynq7000: add TCL preset support
2021-12-20 16:54:18 +01:00
Robert Szczepanski
bf52f222af
tools/litex_json2renode: Add more restrictions to memory regions filter
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Skip regions that have size==0 or if region is included in another region.
Abort script if region overlap on another region.
Signed-off-by: Robert Szczepanski <rszczepanski@antmicro.com>
2021-12-20 13:56:40 +01:00
Franck Jullien
f4dab5adac
bios: add write size option to cmd mem_write
2021-12-17 20:45:41 +01:00
enjoy-digital
321b91d551
Merge pull request #1134 from fjullien/efinix_titanium_support
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Efinix titanium support
2021-12-17 15:55:08 +01:00
Franck Jullien
ca67ed8c13
efinix: check SLEWRATE property when adding a 'normal' GPIO
2021-12-17 13:52:05 +01:00
Franck Jullien
df20ea5aa8
efinix: when a GPIO block is added, also add pin properties
2021-12-17 13:52:05 +01:00
Franck Jullien
df34b3ae6a
efinix: supports for EfinixTristateImpl with nbits > 1
2021-12-17 13:51:56 +01:00
Florent Kermarrec
a6ed4c5c09
cores/prbs: Change wrap parameter to with_errors_saturation (opposite) and disable saturation by default.
2021-12-14 09:41:17 +01:00
enjoy-digital
fda682a4a6
Merge pull request #1132 from smunaut/prbs
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cores/prbs: Add a 'wrap' option to PRBSRX
2021-12-14 08:17:08 +01:00
Sylvain Munaut
477e51849a
cores/prbs: Add a 'wrap' option to PRBSRX
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If enabled, then the error count wraps around when it
reaches the limit of the 32b counter instead of saturating
to a max value.
Software can then detect the wrap and act accordingly.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2021-12-13 19:46:06 +01:00
Florent Kermarrec
e50ff33c6e
test/test_cpu: Disable Minerva test for now.
2021-12-13 16:51:23 +01:00
enjoy-digital
cec83a5dd8
Merge pull request #1131 from fjullien/efinix_titanium_support
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Efinix titanium support
2021-12-13 15:44:04 +01:00
Franck Jullien
40c001d522
check calculated PLL frequencies against user's values
2021-12-13 14:47:57 +01:00
Franck Jullien
eafee9dac5
efinix: add Titanium PLL support
2021-12-13 14:47:49 +01:00
Franck Jullien
148d124d03
efinix: get family name from device name
2021-12-13 14:36:54 +01:00
Franck Jullien
f37188c358
efinix: add more valid IOStandard
2021-12-13 14:34:08 +01:00
Franck Jullien
12e5443489
efinix: fix efxpt:single_conn parsing
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Sometimes instance can be this form:
<efxpt:single_conn ... instance="GPIOT_PN_16.lvttl1,...
This patch handle this case
2021-12-13 14:31:34 +01:00
Florent Kermarrec
92f5a9f0e6
soc/cores/led/WS2812: Add Bus Mastering capability.
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Useful on small FPGAs to reduce resource usage: When enabling bus mastering,
the core is able to automatically read led values from the bus and can then
avoid the internal memory. This is particularly useful when reading values
from SPI Flash with a small "Player" core just updating the base address.
2021-12-12 15:18:24 +01:00
enjoy-digital
649c45e962
Merge pull request #1128 from gregdavill/fatfs-alignment-fix
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software.fatfs: Align fatfs sector buffers
2021-12-10 21:54:34 +01:00
enjoy-digital
65a8249f4b
Merge pull request #1130 from whitequark/master
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litex_setup: nMigen has been renamed to Amaranth HDL
2021-12-10 21:43:04 +01:00
whitequark
9329d3f092
litex_setup: nMigen has been renamed to Amaranth HDL.
2021-12-10 17:41:30 +00:00
Gabriel Somlo
d108d2ad3d
tools/litex_json2dts_linux.py: update mmc node
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Add `reg-names` property, which facilitates cleaner probing
for the upstream Linux device driver. Also, add a reference
to the LiteX sys_clk, also for the benefit of the upstream
driver, which can't rely on the CPU frequency matching sys_clk.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2021-12-10 11:05:58 -05:00
Gabriel Somlo
b4fb3ea981
tools/litex_json2dts_linux.py: update clock specification
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Remove `bus-frequency` property from `soc` node. Instead,
create a separate `clocks` section containing a node to
represent the LiteX sys_clk, which may be referenced from
other peripherals if needed.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2021-12-10 11:02:35 -05:00
Greg Davill
416886c723
software.fatfs: Align fatfs sector buffers
2021-12-10 17:27:26 +10:30
Florent Kermarrec
230ba5f7ba
cpu/gowin_emcu: Minor cosmetic cleanups, add copyright.
2021-12-09 16:01:41 +01:00
enjoy-digital
7286f95f55
Merge pull request #1125 from fjullien/efinix_add_bank_voltage
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efinix: add io bank voltage configuration
2021-12-09 14:26:33 +01:00
enjoy-digital
435e16c421
Merge pull request #1126 from sergachev/feature/gowin_emcu
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Add initial Gowin EMCU support
2021-12-09 14:25:04 +01:00
Ilia Sergachev
db83b38a2a
cores/cpu: add initial Gowin EMCU support
2021-12-08 23:51:57 +01:00
Ilia Sergachev
18a1d74cf6
soc/interconnect: add basic ahb support
2021-12-08 23:08:45 +01:00
Franck Jullien
5efb64b80b
efinix: add io bank voltage configuration
2021-12-08 18:04:11 +01:00
Florent Kermarrec
9482cbc85d
soc/add_pcie: Expose more DMA parameters.
2021-12-08 08:21:09 +01:00
enjoy-digital
d3b493d4e8
Merge pull request #1124 from tcal-x/cfu-finalize
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Defer adding the CFU instance until cpu.do_finalize().
2021-12-07 18:34:09 +01:00
enjoy-digital
96b3587225
Merge pull request #1123 from LazyDodo/master
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build/altera: fix rbf generation on windows
2021-12-07 18:33:13 +01:00
Tim Callahan
85a3b00d1f
Defer adding CFU instance until cpu.do_finalize().
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Signed-off-by: Tim Callahan <tcal@google.com>
2021-12-07 00:09:59 -08:00
Ray Molenkamp
235e55c9af
build/altera: fix rbf generation on windows
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Testing for a file existing is slightly different
between bash and .bat files which caused the batch
file to error out.
2021-12-06 09:39:19 -07:00
enjoy-digital
cdaf8af555
Merge pull request #1121 from gregdavill/dram-rank-fix
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soc.intergration.dram: Use nranks in capacity calc
2021-12-06 10:33:09 +01:00
Greg Davill
4679b86314
soc.intergration.dram: Use nranks in capacity calc
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This ensures that dual ranked memory appears with the correct capacity
2021-12-05 15:34:24 +10:30
Florent Kermarrec
d9c44c46ab
cores/clock/gowin_gw1n: Add back GW1NR support.
2021-12-02 18:22:42 +01:00
enjoy-digital
e6f316d0f4
Merge pull request #1115 from sergachev/master
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Improve Gowin clock primitive support
2021-12-02 09:13:31 +01:00