Hardware/litex
1
0
Fork 0
mirror of https://github.com/enjoy-digital/litex.git synced 2025-01-04 09:52:26 -05:00
Code Issues Projects Releases Packages Wiki Activity
7192 commits 42 branches 14 tags 31 MiB
Commit graph

7192 commits

This branch
This branch
All branches
Author SHA1 Message Date
Florent Kermarrec
9a931324c2 get_data_mod: Update pip to pip3 to avoid issues on systems with Python2 still installed. 2021-09-28 16:27:13 +02:00
enjoy-digital
a5b3ab1bc9
Merge pull request #1051 from antmicro/picolibc-updates 
Picolibc updates
 2021-09-28 16:01:29 +02:00
Karol Gugala
9f1108c2fc libc: refactor picolibc build deps 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2021-09-28 15:17:30 +02:00
Karol Gugala
b9c4d7ba51 libc: add _impure_ptr definition 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2021-09-28 15:17:08 +02:00
Karol Gugala
22f50ec7ff libc: add errno include 
This solves missing `__errno` symbol linker errors

Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2021-09-28 15:16:34 +02:00
Florent Kermarrec
a588c3b830 software/libc: Disable Atomics support on fgetc/ungetc since seems broken (at least on Rocket). 2021-09-28 14:51:02 +02:00
enjoy-digital
99d8bbc3bc
Merge pull request #1050 from antmicro/fix-litex_setup_url 
Revert litex_setup_url change
 2021-09-28 14:28:29 +02:00
Florent Kermarrec
061b89beff cpu/picolibc: Add family property to CPUs and directly use it for picolibc. 2021-09-28 14:20:13 +02:00
Florent Kermarrec
b451f102c6 software/libc/stdio: Simplify/Cleanup. 2021-09-28 14:04:24 +02:00
Florent Kermarrec
12c93ea895 litex_sim: Generate gtkw_savefile only with --trace. 2021-09-28 13:32:12 +02:00
Michal Sieron
c0e7e3acd3 Revert litex_setup_url change 2021-09-28 12:35:20 +02:00
Florent Kermarrec
782744bae3 tools/litex_sim/generate_gtkw_savefile: Check main_ram presence. 2021-09-28 10:02:17 +02:00
Florent Kermarrec
de738e153d tools/litex_sim: Avoid double build iteration with pre_run_callback function. 2021-09-28 09:58:43 +02:00
Florent Kermarrec
c98c777bed integration/builder: Avoid picolibc/compiler_rt dependencies when not using the LiteX BIOS & minor cleanups. 2021-09-28 08:57:49 +02:00
Tim Ansell
29fb1c48d0
Merge pull request #1046 from antmicro/libc-deps 
software: libc: fix Makefile dependecies
 2021-09-27 14:56:25 -07:00
Karol Gugala
d101ef7ed0 software: libc: fix Makefile dependecies 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2021-09-27 23:05:54 +02:00
Florent Kermarrec
01a906add7 software/liblitesdcard: Fix compilation with picolibc. 2021-09-27 18:56:18 +02:00
Florent Kermarrec
727d898a6c software/libliteeth: Update/Fix compilation with picolibc. 2021-09-27 18:54:28 +02:00
Florent Kermarrec
54623dbe26 litex_setup: Update picolibc url (now on litex-hub). 2021-09-27 18:15:10 +02:00
enjoy-digital
7119dd8098
Merge pull request #1023 from lschuermann/dev/litex-sim-gmii-xgmii 
litex_sim: add support for simulated GMII & XGMII, rewrite XGMII module
 2021-09-27 17:48:44 +02:00
enjoy-digital
87f7f3bc45
Merge branch 'master' into dev/litex-sim-gmii-xgmii 2021-09-27 17:47:26 +02:00
Florent Kermarrec
9ab82cacda soc/add_ethernet/etherbone: Fix conflicts/Update. 2021-09-27 17:43:39 +02:00
enjoy-digital
17abdfd12d
Merge pull request #1043 from enjoy-digital/rocket-remove-reset-inserter 
cpu/rocket/core: Remove ResetInserter on adapters.
 2021-09-27 16:34:46 +02:00
Florent Kermarrec
49f8652f91 ci: Install meson (now required by picolibc). 2021-09-27 16:19:56 +02:00
Florent Kermarrec
746d698b49 litex_setup.py: Revert LiteX url. 2021-09-27 16:15:16 +02:00
Florent Kermarrec
3d32ac3d2e software: Avoid libase renaming to libutils/libcomm and keep readchar/putsnonl retro-compatibility. 
We'll maybe do it but that's probably not the right time. We have to make
the picolibc switch as smooth as possible for users (and so avoid update
as much as possible).

In the long term, it would be good to provide a LiteX C SDK, so we'll make
eventual changes when doing this.
 2021-09-27 16:15:13 +02:00
Florent Kermarrec
ae1d43b965 software/libc/Makefile: Use proper CFLAGS to avoid picolibc warnings and cleanup a bit Makefile. 2021-09-27 16:14:55 +02:00
enjoy-digital
c0b54f0105
Merge pull request #976 from antmicro/libbase-replacement 
Replace libbase with picolibc
 2021-09-27 16:05:24 +02:00
Florent Kermarrec
944732aa19 soc/add_sdram: Also remove ResetInserter on axi.AXI2Wishbone. 2021-09-27 15:46:19 +02:00
Florent Kermarrec
ce0551b44a cpu/rocket/core: Remove ResetInserter on adapters. 
Previously, the SoCController was only reseting the CPU, which required adding
these ResetInserters. Now that the SoCController resets both CPU and peripherals
these ResetInserters are redundant and no longer useful.
 2021-09-27 09:05:46 +02:00
enjoy-digital
c43132f81f
Merge pull request #1040 from gsomlo/gls-rocket-smp 
Rocket SMP support
 2021-09-23 10:56:06 +02:00
Gabriel Somlo
07e47d9357 cpu/rocket: add quad-core (smp) variants 
- 4-core "full" (fpu-enabled) variants with double, quad mem. bus width
- 4-core "linux" (fpu-less) variant with single (64-bit) mem. bus width
 2021-09-22 16:59:04 -04:00
Gabriel Somlo
901b19828c cpu/rocket: include core count as per-variant parameter 
Repurpose (and rename to `CPU_SIZE_PARAMS`) the current
`AXI_DATA_WIDTHS` array. In addition to axi widths for
mem and mmio ports, also include each variant's number
of cores, to facilitate dynamically generated per-core
signals.
 2021-09-22 16:58:11 -04:00
Gabriel Somlo
e6aaa40d2d cpu/rocket: bios support for SMP 2021-09-22 13:51:18 -04:00
Gabriel Somlo
2bc8124114 cpu/rocket: crt0, boot-helper: use temp. registers (cosmetic) 2021-09-22 13:51:18 -04:00
enjoy-digital
1d302c56da
Merge pull request #1041 from gsomlo/gls-vex-smp-fix 
cpu/vexriscv_smp/crt0.S: only boot core should run data_init
 2021-09-22 19:35:47 +02:00
Florent Kermarrec
60c6077c32 remote/comm_udp: Add padding bytes to Etherbone probe. 
Now required with LiteEth dropping exceeding payload.
 2021-09-22 16:52:08 +02:00
Gabriel Somlo
23b2ac2013 cpu/vexriscv_smp/crt0.S: only boot core should run data_init 
Also, no need for non-boot cores to `call smp_slave`, it's the
immediately following instruction for them already.
 2021-09-22 09:55:20 -04:00
Florent Kermarrec
027f7aa645 tools/litex_json2dts_linux: Fix typo. 2021-09-21 14:32:20 +02:00
Florent Kermarrec
84f1afd6d4 tools/litex_json2dts_linux: Remove mem=/, init= and swiotlb= bootargs. 
Were not useful as pointed by @shenki and @stffrdhrn.
 2021-09-21 13:37:25 +02:00
enjoy-digital
b1b1e92ad0
Merge pull request #1032 from stffrdhrn/json2dts-sdcard 
Json2dts sdcard booting
 2021-09-21 13:13:07 +02:00
Andwer E Wilson
9f75c73d6b build/xilinx/common: Fix Ultrascale SDROutput/Input. 2021-09-21 10:30:36 +02:00
enjoy-digital
233f0fc5f4
Merge pull request #1039 from tcal-x/rm-response-ok 
Remove rsp_payload_response_ok from Vex/CFU hookup code.
 2021-09-21 09:43:15 +02:00
Florent Kermarrec
08779202f4 build/DDRTristate: Fix inconsistencies with SDRTristate (o/i swap). 2021-09-21 08:18:06 +02:00
Tim Callahan
1be449d72b Remove rsp_payload_response_ok from Vex/CFU hookup code. 
The port has already been removed from VexRiscv (issue #1036).

Signed-off-by: Tim Callahan <tcal@google.com>
 2021-09-20 15:02:51 -07:00
Florent Kermarrec
1e24fd87d1 cores/gpio: Simplify #1035. 2021-09-20 17:34:46 +02:00
enjoy-digital
6251474b39
Merge pull request #1035 from lschuermann/dev/litex-sim-gpio 
litex_sim: optionally add GPIOTristate core
 2021-09-20 17:21:29 +02:00
enjoy-digital
0daa86a8bb
Merge pull request #1038 from antmicro/crosslinknx-ddr-tristate 
build/lattice: add DDRTristate for Crosslink-NX
 2021-09-20 14:14:40 +02:00
Florent Kermarrec
49d8000d49 gowin/common: Add Differential Input/Output support. 2021-09-20 14:14:06 +02:00
Florent Kermarrec
9c373242af gowin: Add HyperRAM integration hack to match Gowin EDA expected pattern. 2021-09-20 11:47:32 +02:00