Florent Kermarrec
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a559fc77c8
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remove upload optimization (we will use wishbone later for performance)
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2015-02-24 18:01:04 +01:00 |
Florent Kermarrec
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b6ebcece95
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add read grouping to etherbone, we now have interesting upload speeds... :)
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2015-02-23 18:58:31 +01:00 |
Florent Kermarrec
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ac5b7c073a
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test: add make.py to replace static config.py file
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2015-02-23 18:55:19 +01:00 |
Florent Kermarrec
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71f3a5bf13
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prepare reads grouping to speed up upload
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2015-02-23 18:11:08 +01:00 |
Florent Kermarrec
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e309ba55ea
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use new Migen sel signal to change the way we upload data (will enable fifo bursts)
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2015-02-23 12:34:04 +01:00 |
Florent Kermarrec
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d3486dba91
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rle: increase dw automatically when needed
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2015-02-23 09:41:18 +01:00 |
Florent Kermarrec
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2a2c3af380
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host/dump: optimize get_bits / decode_rle since we can now have large dumps
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2015-02-23 02:14:20 +01:00 |
Florent Kermarrec
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861c54760e
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host/driver/reg: use burst mode to speed up upload of data (useful with Etherbone)
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2015-02-23 00:49:59 +01:00 |
Florent Kermarrec
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a802a5c535
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remove MiSoC dependency
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2015-02-21 23:50:25 +01:00 |
Florent Kermarrec
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15240912c9
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doc: remove IP
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2015-02-21 23:34:08 +01:00 |
Florent Kermarrec
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741ecca5b4
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la: fix intput_buffer clocking when clk_domain is not "sys"
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2015-02-19 11:41:54 +01:00 |
Florent Kermarrec
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37e463da9a
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fix rle when used with subsampler
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2015-02-19 11:34:20 +01:00 |
Florent Kermarrec
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e495e2f537
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driver/la: add samplerate computation (required by sigrok export)
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2015-02-19 11:16:32 +01:00 |
Florent Kermarrec
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8e0553670a
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remove limitation on debug tuple definition
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2015-02-19 10:52:57 +01:00 |
Florent Kermarrec
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5f19955825
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rle: expose length parameter to user, add assertion on dw to encode counter and automatically increase dw in rle mode
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2015-02-19 10:42:13 +01:00 |
Florent Kermarrec
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5fb6beb473
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enable RLE only in POST_HIT_RECORDING state (to ensure programmed offset is respected)
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2015-02-19 10:26:34 +01:00 |
Florent Kermarrec
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788652c6f8
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simplify RLE
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2015-02-19 01:43:04 +01:00 |
Florent Kermarrec
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87f29a307a
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fix typo
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2015-02-18 23:35:50 +01:00 |
Florent Kermarrec
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3680b48216
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dump/sigrok: fix against real dumps, now able to import and export
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2015-02-18 21:45:36 +01:00 |
Florent Kermarrec
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6bfd5ce1d8
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split host files since we now have more drivers/dumps supported
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2015-02-18 16:49:38 +01:00 |
Florent Kermarrec
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2f6465d439
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add sigrok import (to check export against it)
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2015-02-18 15:23:04 +01:00 |
Florent Kermarrec
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130212039e
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continue sigrok export (should almost work)
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2015-02-18 11:59:35 +01:00 |
Florent Kermarrec
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cd43163d9d
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add sigrok export skeleton (wip)
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2015-02-18 00:44:33 +01:00 |
Florent Kermarrec
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5830575797
|
logo : add powered by Migen
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2015-02-17 23:14:21 +01:00 |
Florent Kermarrec
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a5416fa864
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host: add Etherbone driver
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2015-02-17 01:09:53 +01:00 |
Florent Kermarrec
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b64dba7a81
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update download instructions
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2015-02-12 22:03:04 +01:00 |
Florent Kermarrec
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04f7fbd7e2
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simplify litescope export with do_exit call and remove automatic clean
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2015-02-12 21:15:51 +01:00 |
Florent Kermarrec
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989cca24bc
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uart2wb: copy UARTTX/UARTRX from MiSoC to avoid dependency
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2015-02-02 14:23:01 +01:00 |
Florent Kermarrec
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f65848ca92
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doc : add link to generated html/pdf
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2015-01-28 19:59:49 +01:00 |
Florent Kermarrec
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615d7da703
|
README: fix tabs
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2015-01-28 15:55:52 +01:00 |
Florent Kermarrec
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9d6a3e7f2a
|
doc: add skeleton
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2015-01-27 21:35:58 +01:00 |
Florent Kermarrec
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0c907e5afa
|
fill building parameters
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2015-01-27 20:24:14 +01:00 |
Florent Kermarrec
|
7f9174f83d
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add storage qualifier
|
2015-01-27 20:14:07 +01:00 |
Florent Kermarrec
|
fc96b20225
|
add optional subsampler
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2015-01-27 19:58:02 +01:00 |
Florent Kermarrec
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70d7152cda
|
core/storage: split LiteScopeRecorder in LiteScopeRecorderUnit and LiteScopeRecorder
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2015-01-27 11:34:59 +01:00 |
Florent Kermarrec
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64d18796e0
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change CSR class names (do not expose XXYYCSR to user)
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2015-01-25 21:34:13 +01:00 |
Florent Kermarrec
|
a3dae5fc5c
|
host/driver: simplify
|
2015-01-25 16:13:06 +01:00 |
Florent Kermarrec
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4472dac603
|
simplify code and use Sink/Source instead of records
|
2015-01-25 15:58:00 +01:00 |
Florent Kermarrec
|
6f7d85b95c
|
host: remove cpuif (we use the one from MiSoC) and some clean up
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2015-01-23 16:45:04 +01:00 |
Florent Kermarrec
|
9a3e9f86cf
|
simplify LiteScopeLA export (use vns from platform on atexit)
|
2015-01-23 10:07:58 +01:00 |
Florent Kermarrec
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261469814f
|
add hack to generate verilog with AsyncResetSynchronizer (FIXME)
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2015-01-23 03:18:25 +01:00 |
Florent Kermarrec
|
fb7864c2b9
|
add missings __init__.py
|
2015-01-23 01:14:35 +01:00 |
Florent Kermarrec
|
d45991d6eb
|
fix README
|
2015-01-23 01:07:51 +01:00 |
Florent Kermarrec
|
ea48f44b90
|
add LiteScopeLA example
|
2015-01-23 00:46:24 +01:00 |
Florent Kermarrec
|
5c40ff02cb
|
add LiteScopeIO example
|
2015-01-23 00:15:42 +01:00 |
Florent Kermarrec
|
f35f93a7c5
|
start refactoring and change name to LiteScope
|
2015-01-23 00:02:53 +01:00 |
Florent Kermarrec
|
609f8f9abb
|
revert submodules/specials/clock_domains syntax
|
2015-01-22 14:00:50 +01:00 |
Florent Kermarrec
|
fadac0cf83
|
drivers: fix mask generation when using cond
|
2015-01-16 23:50:33 +01:00 |
Florent Kermarrec
|
8f14f67ea6
|
simplify UART2Wishbone and add timeout
|
2015-01-14 18:10:37 +01:00 |
Florent Kermarrec
|
54597f1bfc
|
use new submodules/specials/clock_domains automatic collection
|
2015-01-14 13:55:18 +01:00 |