Commit Graph

121 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq fb9a2788e8 dvisampler/charsync: fix found_control signal 2013-03-24 00:43:22 +01:00
Sebastien Bourdeauducq e06585d9fe dvisampler: clean up EDID data 2013-03-23 13:48:40 +01:00
Sebastien Bourdeauducq 34b8388b45 dvisampler: decode before channel sync 2013-03-22 23:49:25 +01:00
Sebastien Bourdeauducq 037625886d dvisampler: decoding 2013-03-22 21:28:17 +01:00
Sebastien Bourdeauducq d65941d6cc dvisampler: channel synchronization 2013-03-22 18:37:10 +01:00
Sebastien Bourdeauducq 515cdb2bd8 dvisampler: character synchronization 2013-03-21 22:56:13 +01:00
Sebastien Bourdeauducq 7c4ca4fd66 dvisampler/datacapture: deserialize to 10 bits 2013-03-21 19:06:15 +01:00
Sebastien Bourdeauducq fa2331e084 dvisampler/clocking: generate pix reset 2013-03-21 19:02:04 +01:00
Sebastien Bourdeauducq 0a14c3714b dvisampler: software controlled phase detector 2013-03-21 00:46:29 +01:00
Sebastien Bourdeauducq 28cb97068c dvisampler/clocking: proper pix5x reset synchronization 2013-03-18 20:31:59 +01:00
Sebastien Bourdeauducq 5126f616fb dvisampler: use pix5x as IODELAY clock 2013-03-18 19:03:17 +01:00
Sebastien Bourdeauducq 48aae9bee5 Use Instance.Input(..., ClockSignal/ResetSignal) instead of Instance.ClockPort/ResetPort 2013-03-18 17:44:01 +01:00
Sebastien Bourdeauducq 74cc045ee1 dvisampler/datacapture: connect IODELAY IOCLK0 2013-03-17 17:42:22 +01:00
Sebastien Bourdeauducq 621526fb7d dvisampler/datacapture: fix tap counter reg 2013-03-17 17:36:49 +01:00
Sebastien Bourdeauducq 3a0cf278fd dvisampler: fixes 2013-03-17 15:41:50 +01:00
Sebastien Bourdeauducq 9f02ced39e dvisampler: add clocking and phase detector 2013-03-17 14:43:10 +01:00
Sebastien Bourdeauducq 0168f83523 MultiReg: remove idomain 2013-03-15 19:51:29 +01:00
Sebastien Bourdeauducq b2173bba9f Use new ClockDomain API 2013-03-15 19:17:05 +01:00
Sebastien Bourdeauducq e99bafe52b dvisampler: add core, EDID support 2013-03-13 19:56:26 +01:00
Sebastien Bourdeauducq a23df42a7a Use automatic register naming 2013-03-12 15:47:54 +01:00
Sebastien Bourdeauducq a9b723568a Use new module, autoreg and eventmanager Migen APIs 2013-03-10 19:32:38 +01:00
Sebastien Bourdeauducq 0caac2246d Use new 'specials' API 2013-02-24 13:07:25 +01:00
Sebastien Bourdeauducq a22ada36d7 corelogic -> genlib 2013-02-24 12:31:00 +01:00
Sebastien Bourdeauducq 5649e88a90 Use Mibuild 2013-02-11 18:23:06 +01:00
Sebastien Bourdeauducq 51f4f920a2 Do not use super() 2012-12-18 14:55:58 +01:00
Sebastien Bourdeauducq c44ff8941c Move Token 2012-12-14 15:54:16 +01:00
Sebastien Bourdeauducq 3986790621 Remove ActorNode 2012-12-12 22:52:55 +01:00
Sebastien Bourdeauducq 053f8ed82c Fix instantiations 2012-12-06 20:57:00 +01:00
Sebastien Bourdeauducq fee70e9866 Use Wishbone SRAM component from Migen 2012-12-01 12:59:32 +01:00
Sebastien Bourdeauducq 293a62dabe Replace Signal(bits_for(... with Signal(max=... 2012-11-29 23:41:51 +01:00
Sebastien Bourdeauducq 8bf6945dfd Use new bitwidth/signedness system 2012-11-29 23:38:04 +01:00
Sebastien Bourdeauducq 7e2bc00c0a Remove Constant 2012-11-28 23:18:53 +01:00
Sebastien Bourdeauducq 79e5f24a65 Workaround for zero-delay loop simulation problem with Icarus Verilog. TODO: clarify and revert this commit. 2012-11-28 22:49:22 +01:00
Sebastien Bourdeauducq 0620e75cb8 sram: do not use MemoryPort 2012-11-26 19:32:56 +01:00
Sebastien Bourdeauducq ced98d7bee framebuffer: use new SingleGenerator 2012-10-09 21:11:26 +02:00
Sebastien Bourdeauducq dd6eacba62 Remove uses of the RE signal on field registers 2012-10-09 19:08:37 +02:00
Sebastien Bourdeauducq c86dd3cbef Define clock domains instead of passing extra clocks as regular signals 2012-09-11 00:21:07 +02:00
Sebastien Bourdeauducq 5931c5eb59 Basic support for new clock domain and instance API 2012-09-10 23:47:06 +02:00
Sebastien Bourdeauducq 42d5e850fe framebuffer: disable debugger by default 2012-08-05 01:11:37 +02:00
Sebastien Bourdeauducq a5d6ced181 asmicon: fix and simplify refresh grant logic 2012-08-04 22:59:21 +02:00
Sebastien Bourdeauducq ea4c214790 asmicon/bankmachine: respect SDRAM write-to-precharge specification 2012-08-04 22:49:43 +02:00
Sebastien Bourdeauducq 1451cad710 asmicon/multiplexer: correct read-to-write delay to prevent conflicts on the tag bus 2012-08-04 17:38:42 +02:00
Sebastien Bourdeauducq 855eec776d Add ASMIprobe core 2012-08-04 16:31:24 +02:00
Sebastien Bourdeauducq 6807dba8bc asmicon/bankmachine/selector: fix round-robin CE 2012-08-03 22:33:52 +02:00
Sebastien Bourdeauducq df2b653c67 asmicon/bankmachine: do not insert buffer when using _SimpleSelector 2012-08-03 22:11:16 +02:00
Sebastien Bourdeauducq bf8f387324 asmicon: bring full_selector param to top-level 2012-08-03 21:23:54 +02:00
Sebastien Bourdeauducq 0642f0ca94 framebuffer: support df debugger 2012-08-03 18:51:18 +02:00
Sebastien Bourdeauducq 6073f68b69 asmicon: simple selector option 2012-07-13 19:25:38 +02:00
Sebastien Bourdeauducq 768a3a826a x.bv.width -> len(x) 2012-07-13 18:33:03 +02:00
Sebastien Bourdeauducq 809cd99205 asmicon: remove uses of multimux 2012-07-13 18:05:26 +02:00