Dolu1990
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4a49e6d91f
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initialize the clint in sim
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2020-04-18 01:26:31 +02:00 |
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Dolu1990
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befecc7ed6
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cleaning
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2020-04-18 00:51:57 +02:00 |
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Dolu1990
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8c0e534c6b
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Add openSBI test, seem to work fine
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2020-04-18 00:51:47 +02:00 |
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Dolu1990
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ebe070f9dd
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Update README.md
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2020-04-17 19:58:54 +02:00 |
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Dolu1990
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d5a52caab8
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fix smp test barrier
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2020-04-16 17:27:27 +02:00 |
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Dolu1990
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d88d04dbc4
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More SMP tests (barrier via AMO and LRSC)
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2020-04-16 15:23:25 +02:00 |
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Dolu1990
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fd52f9ba50
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Add smp.bin
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2020-04-16 02:22:18 +02:00 |
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Dolu1990
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73c21177e5
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Add VexRiscvSmpCluster, seem to work on simple case
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2020-04-16 01:30:03 +02:00 |
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Dolu1990
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b9ceabf128
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few fixes
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2020-04-16 01:29:13 +02:00 |
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Dolu1990
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46207abbc4
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dataCache now implement invalidation sync
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2020-04-16 01:28:38 +02:00 |
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Dolu1990
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a00605b10c
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fix Briey verilator
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2020-04-13 13:01:12 +02:00 |
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Dolu1990
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467a2bc488
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refactor DBus invalidation, and add invalidation enable
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2020-04-11 19:06:22 +02:00 |
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Dolu1990
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abbfaf6bcf
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regression : restore normal invalidation setup
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2020-04-10 18:58:03 +02:00 |
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Dolu1990
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4a9b8c1f72
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improve invalidation read during write hazard logic
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2020-04-10 14:44:28 +02:00 |
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Dolu1990
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0ad0f5ed3f
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Add d$ invalidation tests
fix d$ invalidation, linux OK
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2020-04-10 14:28:16 +02:00 |
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Dolu1990
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f71f360e32
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Add SMP synthesis
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2020-04-10 14:27:39 +02:00 |
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Dolu1990
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296cb44bc4
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Add hardware AMO support using LR/SC exclusive
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2020-04-09 20:12:37 +02:00 |
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Dolu1990
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1d0e180e1d
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Add GenTwoStage config and UltraScale synthesis
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2020-04-09 20:11:56 +02:00 |
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Dolu1990
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861df664cf
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clean some AMO stuff
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2020-04-08 18:48:01 +02:00 |
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Dolu1990
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6922f80a87
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DataCache now implement fence operations
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2020-04-08 18:12:13 +02:00 |
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Dolu1990
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9e1817a280
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fix DataCache for config without invalidation
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2020-04-07 20:05:24 +02:00 |
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Dolu1990
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0c8ea4a368
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DataCache add invalidation feature
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2020-04-07 19:18:20 +02:00 |
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Dolu1990
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1ef099e308
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Merge branch 'dev' into smp
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2020-04-07 12:29:58 +02:00 |
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Dolu1990
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5eaa5ba4db
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Update README.md
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2020-04-07 12:29:40 +02:00 |
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Dolu1990
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6e239fb280
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Update README.md
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2020-04-07 12:29:40 +02:00 |
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Dolu1990
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f20eb4d541
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Merge pull request #115 from antmicro/fix_emulator
emulator: Use external hw/common.h from LiteX
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2020-04-07 12:29:40 +02:00 |
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Dolu1990
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5aa0b86d96
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Fix DebugPlugin step by step
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2020-04-07 12:13:40 +02:00 |
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Dolu1990
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a52b833727
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fix weird regression testbench memory bug
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2020-04-06 21:42:44 +02:00 |
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Dolu1990
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a107e45116
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fix non smp regression
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2020-04-06 06:43:28 +02:00 |
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Dolu1990
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ca72a421be
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LrSc align software model to the hardware. Linux OK
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2020-04-05 21:45:45 +02:00 |
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Dolu1990
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2eec18de65
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LrSc SMP, linux crash in userspace
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2020-04-05 16:28:46 +02:00 |
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Dolu1990
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f2ef8e95ab
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Implement external LrSc
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2020-04-05 11:38:57 +02:00 |
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Dolu1990
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ff074459ad
|
Fix LrSc for configs without mmu
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2020-04-04 22:54:35 +02:00 |
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Dolu1990
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c9bbf0d12a
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update LrSc reservation logic to match the spec
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2020-04-04 21:21:35 +02:00 |
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Dolu1990
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2dac7dae32
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Fix BranchPlugin.jumpInterface priority to avoid conflicts with other instructions on DYNAMIC_TARGET missprediction
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2020-03-28 14:36:06 +01:00 |
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Dolu1990
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b3215e8beb
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Make things generated in a deterministic order
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2020-03-24 13:11:07 +01:00 |
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Dolu1990
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c122365a52
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Smp spec update, add Interface subsets (writeOnly, readOnly)
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2020-03-11 14:20:13 +01:00 |
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Dolu1990
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ab2f4cd2b7
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Merge branch 'master' into dev
# Conflicts:
# README.md
# build.sbt
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2020-03-09 13:41:23 +01:00 |
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Dolu1990
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5f90702b2f
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SpinalHDL update
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2020-03-09 13:14:16 +01:00 |
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Dolu1990
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defe3c5558
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DataCache relax flush timings
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2020-03-08 12:35:24 +01:00 |
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Dolu1990
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04bf1a4ced
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Fix build.sbt
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2020-03-08 00:23:19 +01:00 |
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Dolu1990
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7a5afb86a5
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Fix build.sbt
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2020-03-07 19:09:33 +01:00 |
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Dolu1990
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97db4f02a0
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Merge branch 'rework_fetch' into dev
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2020-03-07 18:22:46 +01:00 |
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Dolu1990
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44005ebf31
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update Synthesis results
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2020-03-07 18:22:01 +01:00 |
|
Charles Papon
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2c6076ba97
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improve smp spec
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2020-03-07 13:35:21 +01:00 |
|
Charles Papon
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b7ae902bbc
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smp spec improvements, no more read abort
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2020-03-05 00:14:11 +01:00 |
|
Charles Papon
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58af94269e
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add CsrPlugin.csrOhDecoder
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2020-03-05 00:13:04 +01:00 |
|
Charles Papon
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50ec0a1917
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update readme perf
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2020-03-05 00:12:46 +01:00 |
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Charles Papon
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505d0b700a
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MulDivPlugin now give names to div stages
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2020-03-04 19:58:54 +01:00 |
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Dolu1990
|
0a212c91fd
|
update synthesisBench paths
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2020-03-04 18:13:56 +01:00 |