Gwenhael Goavec-Merou
|
1c06988d80
|
platforms,targets/lattice_certuspro_nx_evn,lattice_certuspro_nx_vvml: set sysconfig SPI_MASTER mode by default at platform level
|
2024-07-01 11:07:25 +02:00 |
enjoy-digital
|
40204ac815
|
Merge pull request #595 from trabucayre/lattice_certusnxpro
Lattice certusnxpro
|
2024-06-28 13:26:47 +02:00 |
enjoy-digital
|
5813df9b44
|
Merge pull request #591 from VOGL-electronic/efinix_trion_t20_pulse_reset
targets: efinix_trion_t20_bga256_dev_kit: add pulse for reset
|
2024-06-28 13:24:29 +02:00 |
Gwenhael Goavec-Merou
|
8579af5710
|
lattice_certuspro_nx_vvml: new board support
|
2024-06-28 12:47:57 +02:00 |
Gwenhael Goavec-Merou
|
f27bbc9645
|
lattice_certuspro_nx_evn: new board support
|
2024-06-28 12:47:16 +02:00 |
Florent Kermarrec
|
bd58227c86
|
platforms/sqrl_acorn/_litex_acorn_baseboard_mini_io: Add SFP-I2C and Debug IOs.
|
2024-06-27 14:55:15 +02:00 |
Florent Kermarrec
|
4f8540d53e
|
targets/litex_acorn_baseboard_mini: Switch to _litex_acorn_baseboard_mini_io.
|
2024-06-27 14:23:43 +02:00 |
Florent Kermarrec
|
91e787b5c3
|
platforms/sqrl_acorn: Add _litex_acorn_baseboard_mini_io for LiteX Acorn Baseboard Mini specific IOs.
|
2024-06-27 14:23:17 +02:00 |
Fin Maaß
|
c205bb756b
|
targets: efinix_trion_t20_bga256_dev_kit: add pulse for reset
to do a reset on the trion t20 a pulse is needed.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
|
2024-06-24 09:14:55 +02:00 |
Gwenhael Goavec-Merou
|
75ef26b8e5
|
platforms/machdyne_mozart_mx1.py: adding default_clk_name, default_clk_period (fix CI failure)
|
2024-06-22 22:43:06 +02:00 |
inc
|
cb43cdf6f9
|
targets/machdyne_vanille: set uart_name to stub
|
2024-06-22 12:13:30 +02:00 |
inc
|
a1df389c7e
|
machdyne: switch to LiteXArgumentParser; add mozart ml2+mx1 and vivaldi ml1
|
2024-06-22 11:26:43 +02:00 |
inc
|
34e85c5cf6
|
machdyne: fix typos; add vanille and lakritz
|
2024-06-22 09:26:42 +02:00 |
enjoy-digital
|
95f5e030e5
|
Merge pull request #590 from trabucayre/zynq_csr_master_bus
ZynqXXX boards: remove CSR definition and GP0 connection to CPU
|
2024-06-19 08:48:33 +02:00 |
Florent Kermarrec
|
dad6b2b9b6
|
efinix_trion_t20_bga256_dev_kit: Cleanup/Review platform/target.
|
2024-06-19 08:23:54 +02:00 |
enjoy-digital
|
8eaa4d637e
|
Merge pull request #589 from VOGL-electronic/sdram_efinix_trion_t20
efinix_trion_t20: add sdram
|
2024-06-19 08:18:19 +02:00 |
Gwenhael Goavec-Merou
|
70fb3de96c
|
targets: All boards based on Zynq7000: remove csr definition and GP0 connection to the SoC: now handled by zynq700 core CPU
|
2024-06-19 07:59:24 +02:00 |
Gwenhael Goavec-Merou
|
efd6c8b0aa
|
targets/alinx_axu2cga,xilinx_zcu216,xilinx_kv260: remove csr definition and GP0 connection to the SoC: now handled by znqmp core CPU
|
2024-06-19 07:54:50 +02:00 |
Florent Kermarrec
|
07881259a5
|
litex_acorn_baseboard_mini: Assert cleanups.
|
2024-06-18 17:41:01 +02:00 |
Florent Kermarrec
|
6857418deb
|
litex_acorn_baseboard_mini: Allow simultaneous pcie and ethernet.
|
2024-06-18 13:56:08 +02:00 |
Florent Kermarrec
|
805a520b5a
|
litex_acorn_baseboard_mini: Fix and test PCIe Gen2 X1 with it.
|
2024-06-18 09:14:08 +02:00 |
Gwenhael Goavec-Merou
|
27b99d4169
|
targets/lambdaconcept_ecpix5.py: allows configuring eth_ip/remote_ip/dynamic
|
2024-06-14 15:58:25 +02:00 |
Gwenhael Goavec-Merou
|
635e932084
|
targets/lambdaconcept_ecpix5.py: added argument to select version (r02 by default)
|
2024-06-14 15:57:11 +02:00 |
Gwenhael Goavec-Merou
|
6e6246d718
|
platforms/lambdaconcept_ecpix5.py: create_programmer: added option to select between r03 version (FT4232) and provious (FT2232)
|
2024-06-14 15:46:36 +02:00 |
Florent Kermarrec
|
1b22061e93
|
litex_acorn_baseboard_mini: Add PCIe support (Not yet buildable with Ethernet or SATA due to GTPE2_COMMON sharing).
|
2024-06-13 17:46:16 +02:00 |
Florent Kermarrec
|
eebe983914
|
platforms/sqrl_acorn: Add PCIe X1 pins when mounted in baseboard.
|
2024-06-13 17:23:26 +02:00 |
Fin Maaß
|
2cd89cdd16
|
efinix_trion_t20: add sdram
add sdram of the efinix trion t20 bga256 dev kit.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
|
2024-06-13 12:16:09 +02:00 |
Florent Kermarrec
|
ed6ff8f4fe
|
targets: Switch to LiteX byte size definitions.
|
2024-06-13 10:04:19 +02:00 |
enjoy-digital
|
1013a53240
|
Merge pull request #587 from akioolin/master
Add HSEDA XC7A35T board support
|
2024-06-11 18:50:06 +02:00 |
Gwenhael Goavec-Merou
|
8bb3caee5f
|
targets/quicklogic_quickfeather: updated qlal4s3b_cell_macro Clock and Reset signals (similar fix to #1797)
|
2024-05-30 08:37:14 +02:00 |
Akio
|
3c181106b8
|
Add HSEDA XC7A35T board support
Add HSEDA XC7A35T board support
|
2024-05-21 21:00:27 +08:00 |
Gwenhael Goavec-Merou
|
b8d2b513a3
|
platforms/xilinx_zcu102.py: added PMOD0/1 (j55/j87)
|
2024-05-21 11:24:22 +02:00 |
Gwenhael Goavec-Merou
|
11956b1709
|
platforms/xilinx_zcu106.py: added connectors and FMC HPC0/1
|
2024-05-17 12:16:33 +02:00 |
enjoy-digital
|
c660a7a1af
|
Merge pull request #585 from hansfbaier/qmtech-fgg676-fix
qmtech_artix7_fgg676.py: This board also has a 200T variant
|
2024-05-16 11:09:19 +02:00 |
enjoy-digital
|
f544fec11b
|
Merge pull request #584 from hansfbaier/alientex_davincipro
alientek_davincipro: fix part number
|
2024-05-16 11:08:14 +02:00 |
Gwenhael Goavec-Merou
|
0b1728ce2a
|
platform/xilinx_zcu102: fixed FMC HP0 pinout
|
2024-05-14 12:12:35 +02:00 |
Hans Baier
|
7166ef5bba
|
qmtech_artix7_fgg676.py: This board also has a 200T variant, and all variants are speedgrade 2
|
2024-05-14 08:41:05 +07:00 |
Florent Kermarrec
|
19bce6630d
|
Add initial LimeSDR XTRX Platform support (Adapted from Fairwaves XTRX).
|
2024-04-26 16:00:40 +02:00 |
Florent Kermarrec
|
7a0ee7f5cf
|
platforms/fairwaves_xtrx: Change rst to rst_n (active low).
|
2024-04-26 15:50:28 +02:00 |
Florent Kermarrec
|
5a25a4e2b4
|
alinx_axau15p: Switch to OpenFPGALoader.
Requires: https://github.com/trabucayre/openFPGALoader/pull/452
|
2024-04-25 17:23:39 +02:00 |
Hans Baier
|
f0c0005126
|
alientek_davincipro: fix part number
|
2024-04-25 07:42:19 +07:00 |
enjoy-digital
|
7cfc622353
|
Merge pull request #583 from hansfbaier/alientex_davincipro
alientek davincipro: fix speedgrade
|
2024-04-23 15:54:33 +02:00 |
Florent Kermarrec
|
a6b8457111
|
target/efinix_ti60_f225: Add L2 Cache (16KB for now) to improve perfs/Coremark.
|
2024-04-23 11:45:07 +02:00 |
Florent Kermarrec
|
e4a15f6064
|
targets/alinx_axau15: Remove unwanted add_sdcard() call.
|
2024-04-23 11:40:01 +02:00 |
Hans Baier
|
e0e2bf8f97
|
add Alientek DaVinci Pro FPGA board
|
2024-04-22 14:44:53 +07:00 |
Hans Baier
|
110c051779
|
add Alientek DaVinci Pro FPGA board
|
2024-04-22 13:46:39 +07:00 |
Florent Kermarrec
|
aaab2dcfe2
|
alinx_axau15: Add PCIe speed support (Gen3 or Gen4) and add SDCard parameter.
|
2024-04-19 14:35:13 +02:00 |
Florent Kermarrec
|
3dc2fb9c0d
|
ti60_f225_dev_kit: Remove Ethernet/Etherbone debug that is no longer useful.
|
2024-04-12 12:21:36 +02:00 |
Gwenhael Goavec-Merou
|
fad45b45c1
|
targets/limesdr_mini_v2.py: allows using jtag_uart and added a note to load a demo firmware with litex_term + jtag_uart
|
2024-04-11 15:12:17 +02:00 |
Sylvain Munaut
|
24db5783c1
|
adi_adrv2crr: Fix typo in PMOD pinout
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
|
2024-04-10 14:06:47 +02:00 |