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1168 Commits

Author SHA1 Message Date
inc fd59d954ba add support for minze board 2023-12-29 06:01:59 +01:00
Florent Kermarrec 982038508e alinx_axau15/PCIe: Switch to Gen3/128-bit for now (configuration used on others Ultrascale+ Gen3 X4 boards). 2023-12-28 19:56:52 +01:00
Florent Kermarrec e229d1a0b6 alinx_axau15: First review/cleanup pass and fix missing INTERNAL_VREF on bank 66. 2023-12-28 19:48:50 +01:00
enjoy-digital b340d9e5e7
Merge pull request #550 from Johnsel/master 
alinx_axau15: Added new Alinx Artix US+ board
 2023-12-28 19:24:14 +01:00
inc 754b6d2427 add support for mozart ml1 2023-12-19 22:18:21 +01:00
Gwenhael Goavec-Merou e8bc9fa81d targets/sipeed_tang_nano_4k: adding description to write Gowin EMCU firmware 2023-12-14 13:24:57 +01:00
John Simons 2c2b3e318a Fixed pinout and first steps adding PCIe support 2023-12-12 15:44:51 +01:00
John Simons ab60d91138 alinx_axau15: Fixed minor clock and sdcard reference issues 2023-12-05 21:14:57 +01:00
John Simons 7be052911b alinx_axau15: Added new Alinx Artix US+ board 2023-12-05 20:45:57 +01:00
Florent Kermarrec 6333fbe724 targets/siglent_sds1104xe: Update with new LiteX Ethernet/Etherbone integration. 2023-11-13 09:02:09 +01:00
Florent Kermarrec 1969b4f6d3 siglent_sds1104xe: Update Ethernet/Etherbone integration. 2023-11-10 18:58:42 +01:00
Gwenhael Goavec-Merou fd36608438 sipeed_tang_mega_138k: fix pins DRIVE, remove a[15], fix memory model 2023-11-10 07:39:19 +01:00
enjoy-digital 17a0152ef9
Merge pull request #547 from trabucayre/tangMega138k 
Tang mega138k
 2023-11-09 11:56:58 +01:00
Gwenhael Goavec-Merou 4ff1362e5b targets,platforms/sipeed_tang_mega_138k: fix copyright 2023-11-09 11:55:35 +01:00
Florent Kermarrec 8e3dc21ce5 aliexpress_xc7k70t: Review/Cleanup. 
- Cosmetic cleanups in platform.
- Add clk50 constraint.
- Remove JTAGBone specific support since now directly handled by LiteX.
 2023-11-09 08:26:06 +01:00
Hans Baier 69ee48d421 Add AliExpress Kintex XC7K70T board 2023-11-09 10:34:18 +07:00
Gwenhael Goavec-Merou 2c52ce0c47 targets/sipeed_tang_mega_138k: fix SDRAM (requires Mister XSDS v3.0 extension) 2023-11-08 07:13:28 +01:00
Gwenhael Goavec-Merou e9f53685fe targets/sipeed_tang_mega_138k: DDR3 support (not working) 2023-11-08 07:00:24 +01:00
Florent Kermarrec bc74eeca78 targets/digilent_nexys_video: Use reset_buf on sys_clk's create_clkout to improve timings and demonstrate use. 2023-11-07 13:22:30 +01:00
Florent Kermarrec c7ad9adacb terasic_de2_115: Cosmetic cleanup. 2023-11-06 19:21:53 +01:00
enjoy-digital d8228c2c0f
Merge pull request #544 from madprogrammer/master 
Improve terasic_de2_115 target support
 2023-11-06 19:17:54 +01:00
Gwenhael Goavec-Merou e23ac0251a targets/sipeed_tang_mega_138k: HDMI support 2023-11-05 16:36:59 +01:00
Florent Kermarrec 8792dd8e53 target/analog_pocket: Remove debug (Will be investigated externally). 2023-10-27 15:32:36 +02:00
Sergey Anufrienko ce951589d1 improve terasic_de2_115 target support 2023-10-23 21:15:00 +03:00
Florent Kermarrec 0d560bc240 targets/siglent_sds1104xe: Review. 2023-10-23 19:25:12 +02:00
enjoy-digital 71d8b17fff
Merge pull request #543 from trabucayre/siglent_sds1104xe_etherbone 
targets/siglent_sds1104xe: simplify etherbone by using new etherbone's params to specify hybrid mode
 2023-10-23 19:20:32 +02:00
Gwenhael Goavec-Merou 26d112b094 targets/siglent_sds1104xe: simplify etherbone by using new etherbone's params to specify hybrid mode 2023-10-23 19:07:37 +02:00
Gwenhael Goavec-Merou afbf9eb8c9 target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally 2023-10-23 17:43:13 +02:00
Gwenhael Goavec-Merou a6f3c5276e target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
Gwenhael Goavec-Merou a4fc45bba6 targets/efinix_titanium_ti60_f225_dev_kit: adding jtagbone support (`litex_server --jtag --jtag-config openocd_titanium_ft4232.cfg`) 2023-10-18 09:11:54 +02:00
Florent Kermarrec eae62a60ac target/analog_pocket: Fix. 2023-10-17 21:40:46 +02:00
Florent Kermarrec cc19078650 targets/analog_pocket: Disable debug for CI. 2023-10-17 15:23:58 +02:00
Florent Kermarrec f86ba2dea0 targets/analog_pocket: Add debug code for framebuffer (wip). 2023-10-17 13:18:07 +02:00
Gwenhael Goavec-Merou 9ae224a2a7 sipeed_tang_primer_25k: new board 2023-10-17 07:45:40 +02:00
enjoy-digital 3a75f6cf79
Merge pull request #537 from rniwase/master 
xilinx_zcu102: Add pin definitions for DDR4 SDRAM and FMC connectors, add litedram to the target.
 2023-10-14 20:14:53 +02:00
rniwase 9fb388407a targets/xilinx_zcu102: Add litedram to the target. 2023-10-14 00:00:26 +09:00
darryln e0e8600db4 fix help text 2023-10-12 11:21:20 -04:00
Florent Kermarrec ec2f9480b8 targets/analog_pocket: Fix indent on videophy/cores. 2023-10-09 11:59:32 +02:00
Florent Kermarrec 6386f290e9 targets/analog_pocket: Add --video-colorbars/video-terminal/video-framebuffer arguments. 2023-10-09 10:59:15 +02:00
Florent Kermarrec dec25b7ce9 targets/analog_pocket: Add initial Video support. 
From https://github.com/tpwrules/pocket_linux.
 2023-10-09 10:14:00 +02:00
Florent Kermarrec 7359a331eb analog_pocket: Add 1:2 (HalfRate) SDRAM support. 2023-10-06 19:25:42 +02:00
Florent Kermarrec d00810c983 sds1104xe: Fix typo. 2023-10-06 19:25:22 +02:00
Florent Kermarrec 3d7a1dd152 analog_pocket: +x. 2023-10-02 16:20:09 +02:00
Florent Kermarrec fd6aee0250 targets/sqrl_acorn: Drive pcie_clkreq_n (Thanks @myftptoyman). 2023-09-27 11:06:50 +02:00
enjoy-digital 29018a8382
Merge pull request #523 from Icenowy/tangmega138k 
[RFC] sipeed_tang_mega_138k: new board
 2023-09-26 19:12:44 +02:00
Florent Kermarrec 3df677cfeb Add initial Analog Pocket platform/target with Clk/SDRAM, able to run a simple SoC with SDRAM over JTAG-UART. 
$ ./analog_pocket.py --uart-name=jtag_uart --build --load
$ litex_term jtag --jtag-config=openocd_usb_blaster.cfg

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2023 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on Sep 21 2023 08:53:57
 BIOS CRC passed (1e2b3f44)

 LiteX git sha1: 7d738737

--=============== SoC ==================--
CPU:		VexRiscv @ 50MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128.0KiB
SRAM:		8.0KiB
L2:		8.0KiB
SDRAM:		64.0MiB 16-bit @ 50MT/s (CL-2 CWL-2)
MAIN-RAM:	64.0MiB

--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Switching SDRAM to hardware control.
Memtest at 0x40000000 (2.0MiB)...
  Write: 0x40000000-0x40200000 2.0MiB
   Read: 0x40000000-0x40200000 2.0MiB
Memtest OK
Memspeed at 0x40000000 (Sequential, 2.0MiB)...
  Write speed: 15.6MiB/s
   Read speed: 22.1MiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex>
 2023-09-21 09:19:57 +02:00
Florent Kermarrec 5064c65dac targets: Switch to openocd_usb_blaster/2.cfg. 2023-09-21 09:16:24 +02:00
Florent Kermarrec b92c96b3a4 colorlight_i9plus: Cosmetic cleanups. 2023-08-30 17:22:11 +02:00
enjoy-digital 3471617878
Merge pull request #502 from chmousset/add_colorlight_i9plus 
[init] added colorlight i9+ based on XC7A50 FPGA
 2023-08-30 16:54:26 +02:00
Florent Kermarrec c960e85d11 targets/efinix: Now rely in LiteX to automatically exclude Tristate IOs. 2023-08-30 09:59:23 +02:00