Commit Graph

94 Commits

Author SHA1 Message Date
Florent Kermarrec b86d76baed build/sim/core/veril.cpp: Flush trace file on finish, fix issue with empty .fst dumps with short simulations. 2024-09-25 08:56:51 +02:00
Florent Kermarrec b2f63b37cc CHANGES.md: Update. 2024-09-20 13:00:40 +02:00
Florent Kermarrec dc29b6f4e5 CHANGES.md: Update. 2024-09-03 09:44:28 +02:00
Florent Kermarrec 3bdbe1ebcf CHANGES.md: Update. 2024-09-02 14:20:09 +02:00
Florent Kermarrec bccd1e9c54 CHANGES.md: Update. 2024-08-19 10:37:13 +02:00
Florent Kermarrec 8afa36f24a CHANGES.md: Update and add Issue/PR number. 2024-06-24 10:52:34 +02:00
Florent Kermarrec 5a0fd6fb60 CHANGES.md: Update. 2024-06-19 09:07:22 +02:00
Florent Kermarrec 3e756ecbbe CHANGES.md: Update. 2024-06-13 10:15:22 +02:00
Florent Kermarrec 8d8dd117b6 soc/integration/builder: Now generates exports by default to output_dir with default name unless explicitly specified. 2024-06-12 11:44:34 +02:00
Florent Kermarrec 4e044f54c7 CHANGES: Update. 2024-06-08 15:39:33 +02:00
Florent Kermarrec 9167d053cc CHANGES.md: Prepare for post 2024.04 changes. 2024-06-08 15:22:13 +02:00
Florent Kermarrec b2b7130b7b version: Bump to 2024.04. 2024-06-05 22:11:11 +02:00
Gwenhael Goavec-Merou b31114bd50 CHANGES.md: updated for microsemi/microchip libero_soc toolchain 2024-05-30 09:35:51 +02:00
Gwenhael Goavec-Merou 94e6bb0247 CHANGES.md: updated for eos_s3 and quicklogic f4pga toolchain 2024-05-30 08:46:42 +02:00
Florent Kermarrec 47bab2fcff CHANGES.md: Update. 2024-05-27 08:41:58 +02:00
Florent Kermarrec 4b3f147fc8 CHANGES: Update. 2024-05-17 12:58:03 +02:00
Florent Kermarrec 8b175c2575 CHANGES: Update. 2024-05-13 16:33:11 +02:00
Florent Kermarrec a44b7944ca CHANGES: Update. 2024-04-16 10:51:19 +02:00
Florent Kermarrec 06009c57a3 build/xilinx/common: Fix missing clk parameter on XilinxSDRTristateImpl. 2024-04-05 16:04:29 +02:00
Florent Kermarrec 87137c3027 CHANGES.md: Update. 2024-03-28 14:24:12 +01:00
Florent Kermarrec 4389742a4f CHANGES.md: Update. 2024-03-25 19:10:40 +01:00
Florent Kermarrec d3ea912339 CHANGES: Update. 2024-02-22 10:24:35 +01:00
Florent Kermarrec fe0363da25 CHANGES.md: Update. 2024-02-13 16:04:13 +01:00
Florent Kermarrec f36e7d379a CHANGES.md: Update. 2024-02-12 17:21:42 +01:00
Florent Kermarrec e44631294a CHANGES.md: Update. 2024-02-01 08:34:17 +01:00
Florent Kermarrec a3904ac26d CHANGES.md: Update. 2024-01-30 09:51:05 +01:00
Florent Kermarrec c31ec79981 CHANGES.md: Update. 2024-01-23 16:02:11 +01:00
Florent Kermarrec 8aa5958fb7 cores/cpu: Add intitial gowin_ae350 support. 2024-01-11 13:11:56 +01:00
Florent Kermarrec c61d2de13b CHANGES.md: Update. 2024-01-04 15:37:58 +01:00
Florent Kermarrec 67cfcadf79 setup.py/CHANGES.md: Prepare 2023.12 release. 2023-12-25 15:36:10 +01:00
Florent Kermarrec 040b554022 CHANGES.md: Update. 2023-12-20 16:11:12 +01:00
Florent Kermarrec 23fbd1b334 CHANGES.md: Update. 2023-12-20 16:10:03 +01:00
Florent Kermarrec 4721029e58 CHANGES.md: Update. 2023-12-20 15:25:14 +01:00
Florent Kermarrec fadea1d31b CHANGES.md: Update. 2023-12-20 08:08:42 +01:00
Florent Kermarrec 048c42820c setup.py: Switch minimum Python version to 3.7 (To allow more than 255 arguments in functions). 2023-12-19 10:32:12 +01:00
Florent Kermarrec 0c3cda3ee8 CHANGES.md: Update. 2023-12-19 10:09:44 +01:00
Florent Kermarrec b6e89c646e CHANGES: Update. 2023-12-14 11:08:55 +01:00
Florent Kermarrec 8d6120c476 CHANGES: Update. 2023-12-08 12:11:37 +01:00
Florent Kermarrec afaeca98ce CHANGES.md: Update. 2023-12-07 16:33:32 +01:00
Florent Kermarrec 4353135f02 CHANGES: Update. 2023-11-16 13:47:17 +01:00
Florent Kermarrec 639c899838 CHANGES.md: Update. 2023-11-10 10:27:37 +01:00
Florent Kermarrec c419706856 CHANGES: Update. 2023-11-09 15:24:40 +01:00
Florent Kermarrec 6598fe9c12 cores/cpu: Add KianV CPU (RV32IMA) initial support.
litex_sim --cpu-type=kianv:

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2023 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on Nov  8 2023 11:14:03
 BIOS CRC passed (6984e675)

 LiteX git sha1: c1e4b3a8

--=============== SoC ==================--
CPU:		KianV-STANDARD @ 1MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128.0KiB
SRAM:		8.0KiB


--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex> ident
Ident: LiteX Simulation 2023-11-08 11:14:00
litex>
2023-11-08 11:37:22 +01:00
Florent Kermarrec 9b8a5b6385 CHANGES: Update. 2023-10-30 19:40:42 +01:00
Florent Kermarrec fa629b782f CHANGES: Update. 2023-10-27 11:40:31 +02:00
Florent Kermarrec 69dc666177 CHANGES: Update. 2023-10-25 16:01:45 +02:00
Florent Kermarrec e426e78e31 CHANGES.md: Update. 2023-10-11 10:17:57 +02:00
Florent Kermarrec 0890bf4c1f CHANGES: Update. 2023-10-11 09:13:33 +02:00
Florent Kermarrec 5380df3994 CHANGES: Update. 2023-10-06 19:50:52 +02:00
Florent Kermarrec cd8218779e soc/cores/video/VideoFramebuffer: Add VTG/DMA synchronization when DMA is enabled to simplify use. 2023-10-06 10:11:34 +02:00