264bc61e04
genlib/fifo: add replace command to sync FIFO
2014-09-10 21:19:15 +08:00
3d84a7a9de
cordic: round() constants if not power of two bitwidth, cleanup, simplify some logic
2014-09-07 16:49:12 +08:00
683643266f
cordic: vivado is bad at inferring compact adder/subtractor logic
2014-09-04 15:25:34 +08:00
b124a98d92
genlib: add reset synchronizer
2014-08-06 19:38:37 +08:00
8baa957539
genlib/fifo: use synchronous memory read instead of additional register
...
The latter causes problems with InsertReset
2014-08-02 08:52:49 +08:00
ff1d105c7e
genlib/SyncFIFO: remove flush signal (use InsertReset instead)
2014-07-17 19:15:45 -06:00
ea0f4706f5
fsm: set reset_state as default state
2014-06-22 15:21:22 +02:00
4c426b36f3
fifo: add support for depth=2
2014-06-15 23:58:46 +02:00
ac1363565d
genlib/fifo: add SyncFIFOClassic and SyncFIFOBuffered
2014-04-05 12:15:14 +02:00
0023b742e4
genlib/coding: gracefully handle flen(i) < 2
2014-03-19 18:12:27 -07:00
b03d9f4c14
genlib/fifo: add flush, expose level in SyncFIFO
...
AsyncFIFO would need versions of flush and level in each clock domain
plus some handshaking on double flush.
Signed-off-by: Robert Jordens <jordens@gmail.com>
2014-03-15 23:10:46 -07:00
8d3d61ba98
fhdl.size: rename to bitcontainer
2013-12-03 22:51:52 +01:00
ae6b78faeb
genlib/divider: fix diff computation
2013-12-02 17:56:03 +01:00
dd24fdd356
genlib/sort: add bitonic, combinatorial sorter
...
complete with with api documentation and unittests
2013-12-02 12:56:36 +01:00
9762546c95
genlib/cordic: cleanup, documentation, unittests
2013-12-02 12:56:24 +01:00
5b26fb10a9
genlib/coding: add docstrings, add it to api doc
2013-11-29 23:25:31 +01:00
5ccd1799f2
genlib/coding, test/test_coding: unittests
2013-11-29 23:25:03 +01:00
502a2871bc
test/test_fifo, genlib/fifo: move test to unittest
2013-11-29 23:11:53 +01:00
e469e5e539
genlib.fifo: fix docstring section syntax
2013-11-29 22:31:51 +01:00
e1b31ec455
genlib/fifo: clarify we behaviour when writable=0
2013-11-28 22:31:10 +01:00
6e9e0a60eb
setup API documentation, start by documenting fifos
2013-11-28 22:14:20 +01:00
7e4024beb3
genlib/fsm: rename {entering,leaving} to after_{entering,leaving}, add before_{entering,leaving}
2013-11-21 23:30:24 +01:00
f658802ff8
replace use of __dict__ with dir()/xdir()
2013-11-02 16:03:47 +01:00
99c53ed9e8
Better record layout parameterization mechanism
2013-10-23 12:54:50 +02:00
98f79021cd
Revert "genlib/record: support passing params in same object"
...
This reverts commit 018afe57ef
2013-10-22 15:23:00 +02:00
b782db14fc
Revert "genlib/fifo: support RecordP"
...
This reverts commit c0d2b5a789
2013-10-22 15:22:40 +02:00
c0d2b5a789
genlib/fifo: support RecordP
2013-10-21 22:30:06 +02:00
018afe57ef
genlib/record: support passing params in same object
2013-10-21 22:05:28 +02:00
4fb3e970b1
genlib/fsm: add entering/ongoing/leaving methods
2013-09-06 14:51:18 +02:00
37930d70ac
genlib/misc: improve genericity of split/displacer/chooser
2013-08-20 18:49:02 +02:00
14ed5c1acc
genlib/record: support abstract signal width
2013-07-27 22:18:06 +02:00
9c7ad6b05b
fhdl: RenameClockDomains decorator
2013-07-26 15:42:14 +02:00
6e1195415e
genlib/roundrobin: fix n==1 case (correctly)
2013-07-26 09:33:33 +02:00
b8ff2f2792
genlib/roundrobin.py: fix n==1 case
2013-07-26 00:41:08 +02:00
cabae0c32b
genlib: remove direct uses of Fragment
2013-07-24 19:25:14 +02:00
5bc9a0b383
fsm.py: set reset_state
2013-07-22 10:30:40 +02:00
9190568685
genlib/fifo/AsyncFIFO: fix data corruption bug
2013-07-17 12:10:39 +02:00
7083764b53
genlib/fifo: add test bench
2013-07-15 21:36:39 +02:00
9c59ea1e26
genlib/misc: remove bitreverse
2013-06-30 14:31:25 +02:00
9d241f8cd3
coding.py: rewrite If() to make verilog more readable
2013-06-30 11:39:47 +02:00
ecc4062071
genlib/coding.py: binary vs. one-hot, priority coding
2013-06-28 15:20:01 +02:00
48a5b86dcd
genlib/cordic: cleanup
2013-06-26 22:46:04 +02:00
0224ea01cb
migen/genlib/cordic.py: generic cordic
...
* rotating or vectoring cordic modes
* circular, linear, or hyperbolic functions
* combinatorial, pipelined or iterative evaluation
* arbitrary width, stages and guard bits
* two or four quadrant mode for circular/rotate
2013-06-26 22:31:36 +02:00
d0caa738bd
FSM: new API
2013-06-25 22:17:39 +02:00
5cd0019231
genlib/fifo: support records
2013-06-17 23:35:10 +02:00
aea3b59432
genlib/fsm: fix handling of zero delayed_enter
2013-06-10 22:49:05 +02:00
cebfe787db
genlib/misc: fix import
2013-05-30 18:46:52 +02:00
f0b0942055
bitreverse: fhdl/tools -> genlib/misc
2013-05-30 18:44:37 +02:00
bac62a32a9
Make memory ports part of specials
...
This is needed to handle cases where a single memory has ports
in two different modules, and one of these modules is subject
to clock domain remapping. The clock domain of the port in that
module only must be remapped.
2013-05-28 16:11:34 +02:00
70ffe86356
New migen.fhdl.std to simplify imports + len->flen
2013-05-22 17:11:09 +02:00
0ec6a7eb4e
genlib/record: match_by_position -> connect_flat
2013-05-11 11:48:21 +02:00
955a9733c8
Revert "genlib/record/connect: add match_by_position"
...
This reverts commit df1ed32765
2013-05-10 17:41:51 +02:00
e97edd7253
genlib/fifo: disable retiming on Gray counter outputs
2013-04-25 14:57:07 +02:00
156ef43ace
genlib/cdc: add NoRetiming
2013-04-25 14:56:45 +02:00
67c3119249
genlib/fifo: add asynchronous FIFO
2013-04-25 13:30:37 +02:00
6c08cd67aa
graycounter: expose binary output
2013-04-25 13:11:15 +02:00
0f9df2d732
genlib: add Gray counter
2013-04-24 19:13:36 +02:00
ea63389823
fhdl: support len() on all values
2013-04-14 13:50:26 +02:00
72ef4b9683
ioo+pytholite: use new Module API
2013-04-10 23:42:46 +02:00
746acdacd1
ioo: move to genlib
2013-04-10 22:28:53 +02:00
df1ed32765
genlib/record/connect: add match_by_position
2013-04-10 21:33:45 +02:00
692794a21f
flow: use Module and new Record APIs
2013-04-10 19:12:42 +02:00
6a3c413717
New bidirectional-capable Record API
2013-04-01 21:53:33 +02:00
3da98ea04d
genlib/record: use getattr instead of __dict__
2013-03-24 00:51:01 +01:00
1897b74f97
genlib/record: add eq
2013-03-24 00:50:33 +01:00
9d7c679b8c
genlib/fifo: simple synchronous FIFO
2013-03-22 18:18:38 +01:00
a94bf3b2c5
genlib/cdc/MultiReg: output clock domain defaults to sys
2013-03-21 10:40:02 +01:00
7a06e9457c
Lowering of Special expressions + support ClockSignal/ResetSignal
2013-03-18 18:36:50 +01:00
2f522bdd9f
genlib/cdc/MultiReg: implement rename_clock_domain + get_clock_domains
2013-03-15 19:50:24 +01:00
e2d156ef64
genlib/cdc/MultiReg: remove idomain
2013-03-15 19:49:24 +01:00
a878db1e3c
genlib: clock domain crossing elements
2013-02-23 19:03:35 +01:00
f9acee4e68
corelogic -> genlib
2013-02-22 23:19:37 +01:00
Sebastien Bourdeauducq
Robert Jordens
Florent Kermarrec
Sebastien Bourdeauducq
David Carne