Sebastien Bourdeauducq
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035870703f
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flow/actorlib: Simple Processor Interface (WIP)
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2012-10-04 18:22:22 +02:00 |
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Sebastien Bourdeauducq
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8101b68965
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fhdl: fix instance get_io
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2012-09-28 18:02:03 +02:00 |
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Sebastien Bourdeauducq
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c273866b08
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fhdl: support expressions in instance ports
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2012-09-22 20:51:10 +02:00 |
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Sebastien Bourdeauducq
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2fc9cae88a
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fhdl: support inverted clock ports in instances
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2012-09-22 20:50:49 +02:00 |
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Sebastien Bourdeauducq
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2e14569b5c
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fhdl/verilog: sort clock domains by name
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2012-09-11 10:00:03 +02:00 |
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Sebastien Bourdeauducq
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9a18a9df3f
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fhdl: list signals in execution order
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2012-09-11 09:59:37 +02:00 |
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Sebastien Bourdeauducq
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e16353a281
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Multi-clock design support + new instance API
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2012-09-10 23:45:02 +02:00 |
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Sébastien Bourdeauducq
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6490785b6c
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Merge pull request #3 from brandonhamilton/upstream
Optionally accept iverilog simulator options
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2012-09-09 10:52:52 -07:00 |
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Sebastien Bourdeauducq
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b45c9546eb
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fhdl/namer: better handling of indices
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2012-09-09 19:33:55 +02:00 |
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Sebastien Bourdeauducq
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589251fffd
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fhdl/tracer: support BUILD_LIST opcode
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2012-09-09 18:53:24 +02:00 |
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Sebastien Bourdeauducq
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910c350021
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fhdl/namer: use execution order indices for variable names as well
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2012-09-09 17:31:35 +02:00 |
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Sebastien Bourdeauducq
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f3e3a3eec7
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fhdl/namer: number objects according to execution order
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2012-09-09 12:27:32 +02:00 |
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Sebastien Bourdeauducq
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51f9a2a963
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fhdl/namer: simplify + more relevant names
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2012-09-09 01:26:33 +02:00 |
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Sebastien Bourdeauducq
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4164fb4ac9
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bus/csr: configurable data width
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2012-08-26 21:19:34 +02:00 |
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Sebastien Bourdeauducq
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5bf19c155f
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sim: ensure clean IPC shutdown
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2012-08-05 00:16:11 +02:00 |
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Sebastien Bourdeauducq
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47c341ecdf
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flow/isd: add freeze register
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2012-08-04 23:39:52 +02:00 |
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Sebastien Bourdeauducq
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6de517f59c
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flow/network: remove print
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2012-08-03 18:50:57 +02:00 |
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Sebastien Bourdeauducq
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25cb25a8ae
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flow/network: option to add debugger
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2012-08-03 18:49:35 +02:00 |
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Sebastien Bourdeauducq
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fd0e281dfc
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flow: in-system debugger module
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2012-08-03 18:49:04 +02:00 |
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Sebastien Bourdeauducq
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adacdadd58
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flow/hooks/DFGHook: add iterator on hooks
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2012-08-03 18:48:35 +02:00 |
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Sebastien Bourdeauducq
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37fe6d64c3
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flow: EndpointHook -> EndpointSimHook
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2012-08-03 12:58:41 +02:00 |
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Sebastien Bourdeauducq
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30f1e77c18
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corelogic/ReorderBuffer: do not touch empty count when issuing and reading at the same time
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2012-07-13 20:21:04 +02:00 |
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Sebastien Bourdeauducq
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8de192dfbd
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x.bv.width -> len(x)
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2012-07-13 18:32:54 +02:00 |
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Sebastien Bourdeauducq
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9cdc88eadf
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fhdl: len() for Constant
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2012-07-13 18:16:50 +02:00 |
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Sebastien Bourdeauducq
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8c169a99df
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corelogic/misc: remove multimux
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2012-07-13 18:05:57 +02:00 |
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Sebastien Bourdeauducq
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599ed8d470
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fhdl: fix value_bv for operators
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2012-07-13 17:40:49 +02:00 |
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Sebastien Bourdeauducq
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b4613d913f
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bus/wishbone: remove use of deprecated multimux
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2012-07-13 17:17:20 +02:00 |
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Sebastien Bourdeauducq
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7f47a2568a
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fhdl: remove _StatementList
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2012-07-13 17:07:56 +02:00 |
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Sebastien Bourdeauducq
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8062e48697
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bus/asmibus: fix per-port tag generation
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2012-07-12 19:37:50 +02:00 |
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Sebastien Bourdeauducq
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c543edf6f3
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actorlib/dma_asmi: out-of-order reader and class factory
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2012-07-12 18:34:13 +02:00 |
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Sebastien Bourdeauducq
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43653dbe1a
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corelogic: reorder buffer (untested)
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2012-07-12 18:33:28 +02:00 |
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Sebastien Bourdeauducq
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eed8fa374d
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fhdl/arrays: use correct BV for intermediate signals
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2012-07-11 12:06:32 +02:00 |
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Sebastien Bourdeauducq
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ed27783a53
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fhdl: arrays (TODO: use correct BV for intermediate signals)
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2012-07-09 15:16:38 +02:00 |
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Sebastien Bourdeauducq
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c82a468506
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bus: CSR initiator
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2012-07-07 22:36:15 +02:00 |
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Sebastien Bourdeauducq
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0b19112f8f
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actorlib/misc/IntSequence: add offset feature
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2012-07-07 00:10:23 +02:00 |
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Sebastien Bourdeauducq
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518501c493
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flow/perftools: refactor to use hooks
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2012-07-06 23:36:23 +02:00 |
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Sebastien Bourdeauducq
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6cf38bfcba
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flow: hooks
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2012-07-06 23:36:10 +02:00 |
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Sebastien Bourdeauducq
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a49dcb328a
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actorlib/structuring/Cast: rawbits parameter
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2012-06-29 16:10:50 +02:00 |
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Sebastien Bourdeauducq
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fa5a9915c3
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doc: actor network
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2012-06-25 16:07:45 +02:00 |
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Sebastien Bourdeauducq
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920aa5dc60
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actorlib: merge composer into ala + derive ComposableSource from ActorNode
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2012-06-25 11:34:58 +02:00 |
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Sebastien Bourdeauducq
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bbfa120e2f
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doc: arithmetic and logic actors
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2012-06-24 19:56:31 +02:00 |
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Sebastien Bourdeauducq
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fd233d5b3c
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Move arithmetic actors to actorlib
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2012-06-24 19:13:49 +02:00 |
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Sebastien Bourdeauducq
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1edaec0d75
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control.For -> misc.IntSequence
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2012-06-22 15:01:47 +02:00 |
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Sebastien Bourdeauducq
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4785ca526b
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flow/perftool: fix cpt equation
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2012-06-21 00:41:22 +02:00 |
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Sebastien Bourdeauducq
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cbc387f69e
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actorlib/sim/SimActor: remove dead time between transactions
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2012-06-20 22:39:52 +02:00 |
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Sebastien Bourdeauducq
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6aff41a883
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actorlib/structuring/Pack: drive busy signal
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2012-06-20 22:39:03 +02:00 |
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Sebastien Bourdeauducq
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34d8ae3c11
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flow: perftools
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2012-06-20 21:59:17 +02:00 |
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Sebastien Bourdeauducq
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6fac3f027f
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examples/dataflow: structuring test
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2012-06-20 18:25:01 +02:00 |
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Sebastien Bourdeauducq
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7d0e179a03
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actorlib: structuring (untested)
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2012-06-20 16:35:01 +02:00 |
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Sebastien Bourdeauducq
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1576cb0950
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actorlib/control: simplify + fix
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2012-06-17 21:19:47 +02:00 |
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Sebastien Bourdeauducq
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66ac62d0bb
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flow/network: fix handling of edges with subrecords at both ends
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2012-06-17 18:31:45 +02:00 |
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Sebastien Bourdeauducq
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75d569a12c
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actorlib/control: use numbers of bits instead of maxima
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2012-06-17 18:29:57 +02:00 |
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Sebastien Bourdeauducq
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4873cfe1a7
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flow/plumbing: Combinator/Splitter should not inherit CombinatorialActor
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2012-06-17 13:45:18 +02:00 |
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Sebastien Bourdeauducq
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98c9da95d1
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flow/network: handle default endpoints correctly in _infer_plumbing_layout
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2012-06-16 22:41:15 +02:00 |
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Sebastien Bourdeauducq
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9af87367eb
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flow/network: require ActorNode be passed to add_connection
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2012-06-16 22:40:26 +02:00 |
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Sebastien Bourdeauducq
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b0b0380ea7
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flow/network: fix ActorNode default params
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2012-06-16 22:39:31 +02:00 |
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Sebastien Bourdeauducq
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1a576e5c83
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flow/actor: fix busy signal generation for pipelined actors
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2012-06-16 22:38:45 +02:00 |
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Sebastien Bourdeauducq
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9228e8a96d
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flow/actor: add single_sink/single_source retrieval methods
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2012-06-16 22:38:16 +02:00 |
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Sebastien Bourdeauducq
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c1450daa93
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flow: insert splitters
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2012-06-16 21:23:42 +02:00 |
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Sebastien Bourdeauducq
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bde8361e19
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flow: insert combinators and infer plumbing layout
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2012-06-16 17:30:54 +02:00 |
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Sebastien Bourdeauducq
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da522cd58d
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Abstract actor graphs
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2012-06-15 17:52:19 +02:00 |
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Sebastien Bourdeauducq
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b14be4c8a3
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actorlib: ASMI sequential reader
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2012-06-12 21:04:47 +02:00 |
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Sebastien Bourdeauducq
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ce9e35b8ef
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fix SimActor get_fragment
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2012-06-12 17:52:08 +02:00 |
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Sebastien Bourdeauducq
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8a23451237
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PureSimulable
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2012-06-12 17:08:56 +02:00 |
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Sebastien Bourdeauducq
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a591510189
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ASMI simulation models
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2012-06-12 16:57:00 +02:00 |
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Sebastien Bourdeauducq
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b7a84b3750
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wishbone: base TargetModel class
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2012-06-10 17:05:10 +02:00 |
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Sebastien Bourdeauducq
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ec501e7797
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bus/wishbone: target model
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2012-06-10 16:40:33 +02:00 |
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Sebastien Bourdeauducq
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f061b25a24
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bus/wishbone/Tap: remove ack feature
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2012-06-10 12:46:24 +02:00 |
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Sebastien Bourdeauducq
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009f26bb9d
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flow/network: refactor graph
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2012-06-08 22:49:49 +02:00 |
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Sebastien Bourdeauducq
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de408b2cba
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flow/ala: fix typo
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2012-06-08 22:48:47 +02:00 |
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Sebastien Bourdeauducq
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356051e8a8
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actorlib: WB reader simulation OK
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2012-06-08 21:31:05 +02:00 |
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Sebastien Bourdeauducq
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11674242c4
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Use super() instead of calling parent constructors directly
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2012-06-08 18:06:12 +02:00 |
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Sebastien Bourdeauducq
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152a7e282e
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actorlib/sim: use set instead of list to represent active transactions
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2012-06-08 17:56:52 +02:00 |
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Sebastien Bourdeauducq
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910c7806cf
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actorlib: generator-based generic simulation actor
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2012-06-08 17:54:03 +02:00 |
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Sebastien Bourdeauducq
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b145f9e5e2
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sim: multiread/multiwrite
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2012-06-08 17:52:32 +02:00 |
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Sebastien Bourdeauducq
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f38ef626de
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corelogic/record: better repr
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2012-06-08 17:49:31 +02:00 |
|
Sebastien Bourdeauducq
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1c0f636c8d
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flow: generic parameter passing to Actor from sequential/pipelined
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2012-06-07 18:24:33 +02:00 |
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Sebastien Bourdeauducq
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a1fc86af8f
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flow: fix actor repr
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2012-06-07 15:48:35 +02:00 |
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Sebastien Bourdeauducq
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680a34465d
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flow: refactor scheduling models
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2012-06-07 14:44:43 +02:00 |
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Sebastien Bourdeauducq
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493b181af1
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bank/description: pad unaligned multi-word registers at the top
|
2012-05-21 22:55:23 +02:00 |
|
Sebastien Bourdeauducq
|
9449bbea0a
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Add LICENSE file
|
2012-05-21 19:56:23 +02:00 |
|
Sebastien Bourdeauducq
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68cd445662
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bus/wishbone2asmi: fix cache tag size
|
2012-05-15 15:18:03 +02:00 |
|
Sebastien Bourdeauducq
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0bea1e2589
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asmi: dat_wm high to disable data write
|
2012-05-15 14:41:54 +02:00 |
|
Sebastien Bourdeauducq
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f2c20e4af0
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bus/asmibus/hub: hack to prevent comb loops
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2012-04-30 17:11:42 -05:00 |
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Sebastien Bourdeauducq
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398ece8fe2
|
fhdl/verilog: add option to display which comb blocks are run
This is a debug hack to help find combinatorial loops in designs.
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2012-04-30 16:38:40 -05:00 |
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Sebastien Bourdeauducq
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0b62e573ae
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sim: pass extra keyword arguments to Verilog converter
|
2012-04-30 16:38:17 -05:00 |
|
Sebastien Bourdeauducq
|
6a52e44d09
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fhdl: support len() on signals
|
2012-04-08 18:06:22 +02:00 |
|
Sebastien Bourdeauducq
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b9c533be51
|
bank/csrgen: allow specifying existing CSR interface
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2012-04-06 14:59:09 +02:00 |
Brandon Hamilton
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49b58a03a0
|
Optionally accept iverilog simulator options
|
2012-04-03 12:58:19 +02:00 |
|
Sebastien Bourdeauducq
|
2a4e49e381
|
fhdl: phase out pads
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2012-04-02 19:21:43 +02:00 |
|
Sebastien Bourdeauducq
|
623e8e436a
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fhdl/verilog: do not attempt to initialize instance and mem output signals
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2012-04-02 12:59:42 +02:00 |
|
Sebastien Bourdeauducq
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6e3b25ebb6
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bus/dfi: reset active low signals to 1
|
2012-04-01 17:43:24 +02:00 |
|
Sebastien Bourdeauducq
|
d3c6b8d16f
|
sim/proxy: support lists
|
2012-04-01 17:19:53 +02:00 |
|
Sebastien Bourdeauducq
|
f3ae22f488
|
fhdl/verilog: initialize internal read-only signals with their reset values
|
2012-04-01 16:39:11 +02:00 |
|
Sebastien Bourdeauducq
|
0dfc215fe8
|
corelogic/roundrobin: handle correctly special case with 1 request source
|
2012-03-31 18:01:40 +02:00 |
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Sebastien Bourdeauducq
|
94b02aa8ed
|
bus/asmicon: initiator
|
2012-03-30 22:16:31 +02:00 |
|
Sebastien Bourdeauducq
|
bb864c65dc
|
sim: proxy
|
2012-03-30 16:40:26 +02:00 |
|
Sebastien Bourdeauducq
|
081b658e2d
|
Update copyright notices
|
2012-03-23 16:41:30 +01:00 |
|
Sebastien Bourdeauducq
|
d47b564fad
|
corelogic/fsm: typo
|
2012-03-18 22:12:46 +01:00 |
|
Sebastien Bourdeauducq
|
5f28103769
|
corelogic/fsm: delayed enters
|
2012-03-18 00:09:40 +01:00 |