9d241f8cd3
coding.py: rewrite If() to make verilog more readable
2013-06-30 11:39:47 +02:00
b0d467d744
pytholite: use eval instead of literal_eval
2013-06-28 19:03:55 +02:00
ecc4062071
genlib/coding.py: binary vs. one-hot, priority coding
2013-06-28 15:20:01 +02:00
48a5b86dcd
genlib/cordic: cleanup
2013-06-26 22:46:04 +02:00
080afdc3f9
fhdl/verilog: fix signedness rules for comparison
2013-06-26 22:45:47 +02:00
0224ea01cb
migen/genlib/cordic.py: generic cordic
...
* rotating or vectoring cordic modes
* circular, linear, or hyperbolic functions
* combinatorial, pipelined or iterative evaluation
* arbitrary width, stages and guard bits
* two or four quadrant mode for circular/rotate
2013-06-26 22:31:36 +02:00
d0caa738bd
FSM: new API
2013-06-25 22:17:39 +02:00
b56cb3cefc
fhdl/verilog: improve error reporting
2013-06-24 19:44:25 +02:00
d6f7b4cee6
lasmi: separate request and data ack to support bankmachine FIFOs (buggy/incomplete)
2013-06-17 23:36:03 +02:00
5cd0019231
genlib/fifo: support records
2013-06-17 23:35:10 +02:00
6d6d232cad
lasmibus/crossbar: better switching policy
2013-06-15 16:51:09 +02:00
ac2cde0e87
asmibus: remove port sharing
2013-06-14 18:34:36 +02:00
0c52c08989
bus/asmibus: fix slot aging timer
2013-06-14 17:57:43 +02:00
1ec1fb9ebe
bus/lasmibus/Crossbar: support cba_shift=0
2013-06-11 18:15:49 +02:00
fe54c68762
lasmi: fix minor problems
2013-06-10 22:49:33 +02:00
aea3b59432
genlib/fsm: fix handling of zero delayed_enter
2013-06-10 22:49:05 +02:00
3a284b9c1e
actorlib: LASMI DMA (untested)
2013-06-10 22:29:39 +02:00
932bfa7e75
bus: Wishbone -> LASMI bridge (untested)
2013-06-10 18:52:07 +02:00
9f560cb758
examples/sim: add LASMI demo
2013-06-09 23:36:51 +02:00
f2e2397c9d
bus/lasmibus: bugfixes
2013-06-09 23:36:32 +02:00
a836cba790
bus/lasmibus: add target and initiator
2013-06-09 16:03:22 +02:00
2948f6a16a
examples/sim: rename abstract_transactions to abstract_transactions_wb, use new APIs, remove ASMI
2013-06-09 14:17:30 +02:00
35f9f2e9d7
bus/lasmi: interface definition and crossbar (untested)
2013-06-08 15:49:50 +02:00
85813b3b58
csr/sram: fix reads on high addresses when word_bits != 0
2013-06-03 21:52:23 +02:00
e5e3492afe
csr/sram: fix page_bits computation
2013-06-03 21:51:44 +02:00
cebfe787db
genlib/misc: fix import
2013-05-30 18:46:52 +02:00
ebbd5ebcd2
bus/csr/SRAM: better handling of writes to memories larger than the CSR width
2013-05-30 18:45:04 +02:00
f0b0942055
bitreverse: fhdl/tools -> genlib/misc
2013-05-30 18:44:37 +02:00
bac62a32a9
Make memory ports part of specials
...
This is needed to handle cases where a single memory has ports
in two different modules, and one of these modules is subject
to clock domain remapping. The clock domain of the port in that
module only must be remapped.
2013-05-28 16:11:34 +02:00
70ffe86356
New migen.fhdl.std to simplify imports + len->flen
2013-05-22 17:11:09 +02:00
5208baada8
bus/wishbone/SRAM: support init and read_only
2013-05-19 20:53:54 +02:00
7ada0159fd
bus/csr/SRAM: support init
2013-05-19 20:53:37 +02:00
27accd72b5
setup.py: update required Python version
2013-05-16 15:24:11 +02:00
792b8fed1b
bus/asmi: port sharing support
2013-05-12 15:58:39 +02:00
f202946717
fhdl/tools/_TargetLister: do not include array keys in targets
2013-05-11 17:28:41 +02:00
0ec6a7eb4e
genlib/record: match_by_position -> connect_flat
2013-05-11 11:48:21 +02:00
955a9733c8
Revert "genlib/record/connect: add match_by_position"
...
This reverts commit df1ed32765
2013-05-10 17:41:51 +02:00
c82b53f1cd
bank/description/AutoCSR: add autocsr_exclude
2013-05-08 20:58:57 +02:00
10212e85e7
dma_asmi: cleanup
2013-05-08 18:58:50 +02:00
b9b6df6f29
bank/eventmanager: refactor, rename EventSourceLevel -> EventSourceProcess, add fully externally controlled event source
2013-05-08 18:12:26 +02:00
7a74dae461
actorlib/spi: add DMAWriteController
2013-05-04 17:38:54 +02:00
fd089b146f
actorlib/dma_asmi/OOOWriter: fix tag offset
2013-05-04 17:38:17 +02:00
12deaa91d8
flow/network/DataFlowGraph: add_buffered_connection
2013-05-02 13:25:30 +02:00
b5b29f6d5d
bank/description/CSRStorage: set reset property of storage for use in test benches
2013-05-02 11:49:23 +02:00
8ffa273719
flow/network: better determination of plumbing layout
2013-05-01 22:13:26 +02:00
471393d0f9
actorlib/dma_asmi: drive dat_wm
2013-05-01 21:52:26 +02:00
c8810a016f
actorlib/spi: add DMA read controller
2013-04-30 18:55:01 +02:00
c70c71502e
actorlib/spi/SingleGenerator: use CSR alignment bits
2013-04-30 18:54:47 +02:00
dc0304a87b
bank/description/CSRStorage: support alignment bits
2013-04-30 18:53:40 +02:00
51f1ace061
flow/network/CompositeActor: expose unconnected endpoints
2013-04-30 18:53:02 +02:00
Robert Jördens
Sebastien Bourdeauducq
Kenneth Ryerson