Florent Kermarrec
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54a8a52e90
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xilinx/programmer: add partial flash_bitstream for vivado (can flash full bitstream, need to be adapted to flash part of the flash (bios, ...))
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2015-02-27 09:05:23 +01:00 |
Robert Jordens
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2b0937153d
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xilinx/programmer: fix xc3sprog (GenericProgrammer)
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2015-02-26 21:36:15 -07:00 |
|
Robert Jordens
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2b12679ef6
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add pipistrello target
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2015-02-26 21:35:42 -07:00 |
|
Robert Jordens
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8de5b947bd
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pipistrello: use fpgaprog
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2015-02-26 21:34:02 -07:00 |
|
Robert Jordens
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ca52aa5b8c
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add fpgaprog programmer
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2015-02-26 21:33:49 -07:00 |
|
Robert Jordens
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5b5d2d15b8
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add pipistrello platform
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2015-02-26 21:33:42 -07:00 |
Sebastien Bourdeauducq
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ba26a400e3
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Merge branch 'master' of https://github.com/m-labs/migen
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2015-02-26 21:32:39 -07:00 |
|
Robert Jordens
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c9ed38dec8
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gensoc: missing self.
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2015-02-26 21:32:11 -07:00 |
|
Sebastien Bourdeauducq
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a3909bb5e2
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Merge branch 'master' of https://github.com/m-labs/misoc
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2015-02-26 21:28:12 -07:00 |
|
Sebastien Bourdeauducq
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28c219ebd2
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platforms/kc705: add user SMA clock
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2015-02-26 16:22:22 -07:00 |
Yann Sionneau
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8364fe6674
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target/kc705: allow access to pll_sys signal before BUFG
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2015-02-26 15:56:10 -07:00 |
|
Yann Sionneau
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dbdb263acc
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mibuild/kc705: add missing pins on FMC LPC
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2015-02-26 15:54:41 -07:00 |
|
Florent Kermarrec
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09fbbca53e
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gensoc: cpus now directly add their verilog sources
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2015-02-26 20:49:21 +01:00 |
|
Florent Kermarrec
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5e8a0c496d
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gensoc: add mem_map and mem_decoder to avoid duplications
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2015-02-26 20:12:27 +01:00 |
|
Florent Kermarrec
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5ac5ffe359
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gensoc: get platform_id from platform
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2015-02-26 19:07:19 +01:00 |
|
Florent Kermarrec
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8da1faf310
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mibuild: move identifier to platforms
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2015-02-26 19:00:43 +01:00 |
|
Florent Kermarrec
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e6a21b2305
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mibuild: fix missing xilinx_common -->xilinx.common change
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2015-02-26 14:04:36 +01:00 |
|
Florent Kermarrec
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554731ae44
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targets/simple: make it generic (no default_platform, use platform's default_clk_name/default_clk_period)
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2015-02-26 13:08:15 +01:00 |
|
Florent Kermarrec
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bd5ed0977b
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platforms: add default_clk_freq/default_clk_name (to use it on simple designs to test MiSOC on various platforms)
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2015-02-26 12:51:57 +01:00 |
|
Florent Kermarrec
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e27a94e7fc
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mibuild: add VivadoProgrammer (only load_bitstream)
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2015-02-26 12:31:19 +01:00 |
|
Florent Kermarrec
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b3faf5f0da
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mibuild: better file organization (create directory for each vendor and move programmers in it)
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2015-02-26 12:25:59 +01:00 |
|
Florent Kermarrec
|
02b3f51382
|
liteeth: fix example_designs generation
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2015-02-26 10:23:38 +01:00 |
|
Florent Kermarrec
|
00862a383c
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liteeth: fix import (from liteeth --> from misoclib.liteeth)
|
2015-02-26 09:48:37 +01:00 |
|
Florent Kermarrec
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60effe1d95
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move files to liteeeth and create example_designs directory
|
2015-02-26 09:35:14 +01:00 |
|
Sebastien Bourdeauducq
|
0267868cbe
|
remove litex submodule
|
2015-02-25 10:40:44 -07:00 |
|
Sebastien Bourdeauducq
|
658cb0e405
|
merge liteeth
|
2015-02-25 10:35:39 -07:00 |
|
Sebastien Bourdeauducq
|
8015d12692
|
move files for misoc integration
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2015-02-25 10:34:11 -07:00 |
|
Florent Kermarrec
|
eef679b6d4
|
phy/sim: generate sop/eop
|
2015-02-25 17:47:44 +01:00 |
|
Florent Kermarrec
|
a559fc77c8
|
remove upload optimization (we will use wishbone later for performance)
|
2015-02-24 18:01:04 +01:00 |
|
Florent Kermarrec
|
6b7026f521
|
add sim phy
|
2015-02-24 01:42:56 +01:00 |
|
Florent Kermarrec
|
b6ebcece95
|
add read grouping to etherbone, we now have interesting upload speeds... :)
|
2015-02-23 18:58:31 +01:00 |
|
Florent Kermarrec
|
ac5b7c073a
|
test: add make.py to replace static config.py file
|
2015-02-23 18:55:19 +01:00 |
|
Florent Kermarrec
|
71f3a5bf13
|
prepare reads grouping to speed up upload
|
2015-02-23 18:11:08 +01:00 |
|
Florent Kermarrec
|
e309ba55ea
|
use new Migen sel signal to change the way we upload data (will enable fifo bursts)
|
2015-02-23 12:34:04 +01:00 |
|
Florent Kermarrec
|
d3486dba91
|
rle: increase dw automatically when needed
|
2015-02-23 09:41:18 +01:00 |
|
Florent Kermarrec
|
2a2c3af380
|
host/dump: optimize get_bits / decode_rle since we can now have large dumps
|
2015-02-23 02:14:20 +01:00 |
|
Florent Kermarrec
|
861c54760e
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host/driver/reg: use burst mode to speed up upload of data (useful with Etherbone)
|
2015-02-23 00:49:59 +01:00 |
|
Florent Kermarrec
|
282c9b9426
|
test: add make.py to replace static config.py file
|
2015-02-23 00:21:12 +01:00 |
|
Florent Kermarrec
|
b1dee774cd
|
tty working
|
2015-02-22 15:23:55 +01:00 |
|
Florent Kermarrec
|
2fa28c1b5d
|
mac: add padding
|
2015-02-22 13:56:06 +01:00 |
|
Florent Kermarrec
|
a802a5c535
|
remove MiSoC dependency
|
2015-02-21 23:50:25 +01:00 |
|
Florent Kermarrec
|
a2370388fb
|
doc: remove IP
|
2015-02-21 23:34:30 +01:00 |
|
Florent Kermarrec
|
15240912c9
|
doc: remove IP
|
2015-02-21 23:34:08 +01:00 |
|
Florent Kermarrec
|
ea7962da12
|
doc: remove IP
|
2015-02-21 23:33:49 +01:00 |
|
Florent Kermarrec
|
acdf511bd1
|
doc: remove IP
|
2015-02-21 23:33:21 +01:00 |
|
Florent Kermarrec
|
7837580020
|
add ft2232h software code (will need rework)
|
2015-02-21 23:19:10 +01:00 |
|
Florent Kermarrec
|
b59c777cab
|
add ft2232h hdl code (will need rework)
|
2015-02-21 23:13:43 +01:00 |
|
Florent Kermarrec
|
1b0bc5ca44
|
init repo structure
|
2015-02-21 23:06:36 +01:00 |
|
Florent Kermarrec
|
4bdb1ffda2
|
add README skeleton
|
2015-02-21 22:58:42 +01:00 |
|
Florent Kermarrec
|
65294a5577
|
add tty over udp (will need mac to insert padding)
|
2015-02-21 21:26:52 +01:00 |