Florent Kermarrec
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0a9043b6c1
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remove MiSoC dependency
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2015-02-21 19:34:14 +01:00 |
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Florent Kermarrec
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52f5955dca
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remove MiSoC dependency
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2015-02-21 19:29:26 +01:00 |
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Florent Kermarrec
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741ecca5b4
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la: fix intput_buffer clocking when clk_domain is not "sys"
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2015-02-19 11:41:54 +01:00 |
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Florent Kermarrec
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37e463da9a
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fix rle when used with subsampler
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2015-02-19 11:34:20 +01:00 |
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Florent Kermarrec
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e495e2f537
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driver/la: add samplerate computation (required by sigrok export)
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2015-02-19 11:16:32 +01:00 |
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Florent Kermarrec
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8e0553670a
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remove limitation on debug tuple definition
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2015-02-19 10:52:57 +01:00 |
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Florent Kermarrec
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5f19955825
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rle: expose length parameter to user, add assertion on dw to encode counter and automatically increase dw in rle mode
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2015-02-19 10:42:13 +01:00 |
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Florent Kermarrec
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5fb6beb473
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enable RLE only in POST_HIT_RECORDING state (to ensure programmed offset is respected)
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2015-02-19 10:26:34 +01:00 |
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Florent Kermarrec
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788652c6f8
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simplify RLE
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2015-02-19 01:43:04 +01:00 |
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Florent Kermarrec
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87f29a307a
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fix typo
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2015-02-18 23:35:50 +01:00 |
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Florent Kermarrec
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3680b48216
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dump/sigrok: fix against real dumps, now able to import and export
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2015-02-18 21:45:36 +01:00 |
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Florent Kermarrec
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6db831e5a8
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update LiteX
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2015-02-18 11:39:22 -07:00 |
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Florent Kermarrec
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73ab271f9a
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targets/kc705: fix csr address conflict on eth
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2015-02-18 10:45:18 -07:00 |
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Florent Kermarrec
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0a38b8c74a
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add LiteX external core and remove ethmac
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2015-02-18 10:43:44 -07:00 |
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Florent Kermarrec
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9ebb8f8022
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remove verilog and move mxcrg.v to misoclib/mxcrg
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2015-02-18 10:40:30 -07:00 |
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Florent Kermarrec
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5500c41915
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move lm32/mor1kx submodules to extcores
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2015-02-18 10:39:18 -07:00 |
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Florent Kermarrec
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4c9554b65c
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gensoc: call do_exit after SoC is built
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2015-02-18 10:38:14 -07:00 |
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Florent Kermarrec
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9326985e05
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update LiteScope
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2015-02-18 16:53:02 +01:00 |
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Florent Kermarrec
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e6f1bdb152
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update LiteScope
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2015-02-18 16:51:35 +01:00 |
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Florent Kermarrec
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6bfd5ce1d8
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split host files since we now have more drivers/dumps supported
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2015-02-18 16:49:38 +01:00 |
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Florent Kermarrec
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08935dce9a
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make.py: add powered by Migen
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2015-02-18 16:39:18 +01:00 |
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Florent Kermarrec
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e17791a85b
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readme/make.py: add powered by Migen
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2015-02-18 16:38:48 +01:00 |
Yann Sionneau
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5bb1c789aa
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mibuild/kc705: add FMC connectors
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2015-02-18 08:32:45 -07:00 |
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Yann Sionneau
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cea1551ae0
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mibuild: support pin names in IO extensions
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2015-02-18 08:32:31 -07:00 |
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Florent Kermarrec
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2f6465d439
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add sigrok import (to check export against it)
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2015-02-18 15:23:04 +01:00 |
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Florent Kermarrec
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130212039e
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continue sigrok export (should almost work)
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2015-02-18 11:59:35 +01:00 |
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Florent Kermarrec
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cd43163d9d
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add sigrok export skeleton (wip)
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2015-02-18 00:44:33 +01:00 |
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Florent Kermarrec
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70f94ea0eb
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logo : add powered by Migen
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2015-02-17 23:17:46 +01:00 |
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Florent Kermarrec
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89eaef0e43
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logo : add powered by Migen
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2015-02-17 23:16:06 +01:00 |
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Florent Kermarrec
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5830575797
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logo : add powered by Migen
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2015-02-17 23:14:21 +01:00 |
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Florent Kermarrec
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79a7f9ecb8
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create BaseSoC as a basic example design and build UDPSoC/EtherboneSoC on top of it
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2015-02-17 12:37:17 +01:00 |
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Florent Kermarrec
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eeaf03669a
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test: we can now test regs with Etherbone
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2015-02-17 01:15:06 +01:00 |
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Florent Kermarrec
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a5416fa864
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host: add Etherbone driver
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2015-02-17 01:09:53 +01:00 |
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Florent Kermarrec
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1a3183c15d
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etherbone: fix addressing
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2015-02-17 00:02:49 +01:00 |
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Florent Kermarrec
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67958f7448
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mac: fix missing core csr generation
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2015-02-16 14:44:36 +01:00 |
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Florent Kermarrec
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da13bd536e
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gensoc: add csr_data_width and csr_address_width as parameters In some case we want to have mode than 32 CSR or and csr_data_width != 8
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2015-02-14 03:24:23 -08:00 |
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Florent Kermarrec
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452c60e0c3
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endpoints: add param_layout parameter (required to pass parameter data with converters and will allow logic optimizations)
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2015-02-14 03:10:56 -08:00 |
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Florent Kermarrec
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319465445d
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actorlib/structuring: fix eop generation in Pack
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2015-02-14 03:07:18 -08:00 |
Sebastien Bourdeauducq
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d51d33af73
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mibuild: make resolve_signals public
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2015-02-14 03:05:07 -08:00 |
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Florent Kermarrec
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beef7425ce
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mibuild: return verilog namespace with build
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2015-02-14 03:02:47 -08:00 |
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Florent Kermarrec
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c7eba8f4c4
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remove crc since each crc is specific. It's probably better to adapt code for each case.
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2015-02-14 03:01:12 -08:00 |
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Florent Kermarrec
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3559de9b4c
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add setup.py
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2015-02-14 02:44:39 -08:00 |
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Florent Kermarrec
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d3cf2594f2
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update download instructions
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2015-02-12 22:03:24 +01:00 |
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Florent Kermarrec
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b64dba7a81
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update download instructions
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2015-02-12 22:03:04 +01:00 |
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Florent Kermarrec
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aedc964908
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update download instructions
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2015-02-12 22:02:50 +01:00 |
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Florent Kermarrec
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04f7fbd7e2
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simplify litescope export with do_exit call and remove automatic clean
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2015-02-12 21:15:51 +01:00 |
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Florent Kermarrec
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f8003c92aa
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simplify litescope export with do_exit call and remove automatic clean
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2015-02-12 21:04:52 +01:00 |
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Florent Kermarrec
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4e4800e1b2
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simplify litescope export with do_exit call
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2015-02-12 21:00:45 +01:00 |
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Florent Kermarrec
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61d12a3431
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fix transport_rx_description (detected with new Migen check)
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2015-02-12 20:45:15 +01:00 |
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Florent Kermarrec
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bceee36ef6
|
etherbone: reads OK on hardware
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2015-02-12 15:50:07 +01:00 |