Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
9,679 Commits 40 Branches 14 Tags 26 MiB
Commit Graph

9679 Commits

Author SHA1 Message Date
Florent Kermarrec 3e756ecbbe CHANGES.md: Update. 2024-06-13 10:15:22 +02:00
Florent Kermarrec fcf9b3b335 litex_json2dts_linux: Use new byte size definition from litex.gen.common. 2024-06-13 09:55:19 +02:00
Florent Kermarrec d782a0f8c6 litex/gen/common: Add short and long byte size definitions. 2024-06-13 09:54:20 +02:00
Florent Kermarrec abdf6d3ee7 soc/integration: Generate CPU_FAMILY config and use it to simplify litex_json2dts_linux.py. 2024-06-13 09:33:04 +02:00
Florent Kermarrec 962bd67431 litex_json2dts_linux: Rename ncpus to cpu_count (Consistency with other variables). 2024-06-13 09:12:41 +02:00
enjoy-digital 2ddf9bb4e5
Merge pull request #1985 from VOGL-electronic/add_spi_master 
soc.py: Add spi master and changes in litex_json2dts_zephyr.py for the spi drivers
 2024-06-13 09:01:48 +02:00
enjoy-digital 7306c3862e
Merge pull request #1984 from VOGL-electronic/json2renode_elf 
litex_json2renode.py: add option for elf bios file and correct vexriscv variants
 2024-06-13 09:00:25 +02:00
Dolu1990 2e4813d6ae Fix vexii axi3 2024-06-12 19:33:20 +02:00
Florent Kermarrec eb3aca2a46 build/vhd2v_converter: Make instance rename when multiple instance more robust. 2024-06-12 15:16:03 +02:00
Florent Kermarrec 8d8dd117b6 soc/integration/builder: Now generates exports by default to output_dir with default name unless explicitly specified. 2024-06-12 11:44:34 +02:00
Dolu1990 8bb10e1617 cpu/vexii: Add AXI3 support via --with-axi3 2024-06-12 11:25:18 +02:00
Gwenhael Goavec-Merou 6ed61e11bc
Merge pull request #1983 from Dolu1990/vexiiriscv 
linux dts: add vexii clint support
 2024-06-11 18:40:13 +02:00
Dolu1990 8c80a6c19c linux dts: rework "rocket" in cpu_name into cpu_name == "rocket" 2024-06-11 13:08:25 +02:00
Fin Maaß bb155b5a90 litex_json2dts_zephyr.py: add custon handler for spiflash 
add custon handler for spiflash.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
 2024-06-11 11:10:57 +02:00
Fin Maaß 44b6fb5a28 add spi master function 
add spi master function and dts wrapper for zephyr.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
 2024-06-11 11:10:57 +02:00
Fin Maaß 53ae12ca65 litex_json2renode: correct VexRiscv variants 
corrrect the VexRiscv variants.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
 2024-06-11 10:42:36 +02:00
Fin Maaß 1ee2e3a31d litex_json2renode: add option for elf bios 
add option for elf bios file.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
 2024-06-11 10:41:26 +02:00
Dolu1990 87ae5db16b linux dts: add vexii clint support 2024-06-10 18:10:13 +02:00
Dolu1990 f0b0d8db29 linux dts: add vexii clint support 2024-06-10 17:02:00 +02:00
Florent Kermarrec 4e044f54c7 CHANGES: Update. 2024-06-08 15:39:33 +02:00
enjoy-digital 7f81499cc5
Merge pull request #1923 from Dolu1990/vexiiriscv 
cpu/vexiiriscv integration
 2024-06-08 15:37:37 +02:00
Florent Kermarrec 9167d053cc CHANGES.md: Prepare for post 2024.04 changes. 2024-06-08 15:22:13 +02:00
Dolu1990 9c202b59d1 Fix axi id width 2024-06-07 18:33:05 +02:00
Dolu1990 bd96b47041 Vexii fix mem data width 2024-06-06 16:36:56 +02:00
Gwenhael Goavec-Merou e25de0f499 build/vhd2v_converter.py: pass work_package to platform 2024-06-06 15:24:20 +02:00
Dolu1990 0e04949485 vexii fix l1 cache size 2024-06-06 13:50:27 +02:00
Florent Kermarrec b2b7130b7b version: Bump to 2024.04. 2024-06-05 22:11:11 +02:00
Artur Kowalski abcc0b8ab6 Fix EOS-S3 build on F4PGA 2024-05-31 12:23:19 +02:00
Florent Kermarrec 329bd36f7f tools/litex_json2dts_linux: Update. 2024-05-30 12:07:54 +02:00
Gwenhael Goavec-Merou b31114bd50 CHANGES.md: updated for microsemi/microchip libero_soc toolchain 2024-05-30 09:35:51 +02:00
Florent Kermarrec cc1a37e386 soc/intergration: Define platform/identifier as configs (and change PLATFORM to PLATFORM_NAME). 2024-05-30 09:28:34 +02:00
Florent Kermarrec 72854b8bef soc/integration/soc: Move adding constant for identifier directly to add_identifier method. 2024-05-30 09:19:24 +02:00
enjoy-digital d9332da433
Merge pull request #1973 from motec-research/dts_schema_compliance 
Dts schema compliance
 2024-05-30 09:16:01 +02:00
enjoy-digital f8cee3836d
Merge pull request #1972 from motec-research/dts_all_soc_sys_clk 
tools/litex_json2dts_linux: add all soc sys_clk
 2024-05-30 09:14:11 +02:00
Gwenhael Goavec-Merou 03e0f0d9a8 build/microsemi/libero_soc.py: replaced tabs by spaces 2024-05-30 08:57:59 +02:00
CLappin 72cade55da
Applying updates for Libero SoC support (#1855) 
* Updated the new_project tcl function and removed set_device function.

* fixing tcl command set_root and adding in build_hierarchy command.

* Adding tcl command to export_prog_job file for FPExpress, saves in Libero SoC default location.

* Attempting error checking on Libero SoC installation, and typo clean up.

* Fixing -adv_options in new_project tcl command.

* Moving script_ext back to its original location.

* Commented out Libero environment variable.

* Removed Libero environment variable.
 2024-05-30 08:56:27 +02:00
Gwenhael Goavec-Merou 94e6bb0247 CHANGES.md: updated for eos_s3 and quicklogic f4pga toolchain 2024-05-30 08:46:42 +02:00
Gwenhael Goavec-Merou 845e20c653 build/quicklogic/f4pga.py: fix Makefile, added a note for futur rework and link to toolchain install's instructions 2024-05-30 08:43:41 +02:00
Andrew Dennison 5e0c3f0a04 tools/litex_json2dts_linux: add compatible, model 
Fixes these dt-schema validation errors:
/: 'compatible' is a required property
	from schema $id: http://devicetree.org/schemas/root-node.yaml#
/: 'model' is a required property
	from schema $id: http://devicetree.org/schemas/root-node.yaml#
 2024-05-30 16:18:11 +10:00
Andrew Dennison 8a0d50b03e tools/litex_json2dts_linux: add all soc sys_clk 
Adds clocks for a downstream iclink soc, for example
when builder.add_json() has imported soc clocks.

Node names are as per devicetree fixed-clock.yaml bindings.
 2024-05-30 16:18:11 +10:00
Andrew Dennison ddc521b033 tools/litex_json2dts_linux: fix tlb-split 
This is also relevant to vexriscv_smp, not rocket specific.

Fixes these dt-schema validation errors:

cpus: cpu@0: 'tlb-split' is a dependency of 'd-tlb-size'
	from schema : http://devicetree.org/schemas/cpus.yaml#
cpus: cpu@0: 'tlb-split' is a dependency of 'd-tlb-sets'
	from schema : http://devicetree.org/schemas/cpus.yaml#
cpus: cpu@0: 'tlb-split' is a dependency of 'i-tlb-size'
	from schema : http://devicetree.org/schemas/cpus.yaml#
cpus: cpu@0: 'tlb-split' is a dependency of 'i-tlb-sets'
	from schema : http://devicetree.org/schemas/cpus.yaml#
 2024-05-30 16:18:11 +10:00
Gwenhael Goavec-Merou d79c91daea
Merge pull request #1797 from Dasharo/s3_fix 
Change EOS S3 clock names
 2024-05-30 06:24:14 +02:00
enjoy-digital 23e654db4c
Merge pull request #1968 from VOGL-electronic/fix_liblitespi 
liblitespi: Fix #1967
 2024-05-28 15:43:07 +02:00
enjoy-digital 7a3b3dcfa2
Merge pull request #1966 from maass-hamburg/dts_zepyhr_include_cpu 
litex_json2dts_zephyr.py: include cpu
 2024-05-28 15:42:38 +02:00
enjoy-digital 914167cb75
Merge pull request #1969 from enjoy-digital/ghdl_fix 
ci: Build/Install GHDL from sources.
 2024-05-28 15:20:43 +02:00
Florent Kermarrec 5257ddaac0 ci: Build/Install GHDL from sources. 2024-05-28 14:33:05 +02:00
Dolu1990 9165886525 snyc 2024-05-28 12:59:27 +02:00
Matthias Breithaupt 025149c6c5 liblitespi: Fix #1967 
Make liblitespi independent from field_access_functions, since they were removed in 46911d5078

Signed-off-by: Matthias Breithaupt <m.breithaupt@vogl-electronic.com>
 2024-05-28 11:27:02 +02:00
Dolu1990 2dac84f32c vexii l2 now support self flush. ex : 
--l2-self-flush=40c00000,40DD4C00,1666666
 2024-05-27 17:37:30 +02:00
Fin Maaß ae13f159c4 litex_json2dts_zephyr.py: include cpu 
include cpu, to share the clock-frequency with
zephyr.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
 2024-05-27 11:29:58 +02:00