Dolu1990
915db9d6c9
cleaning
2019-03-18 20:50:19 +01:00
Dolu1990
001ca45c57
Add cachless dBus IBus access right checks
2019-03-18 12:52:22 +01:00
Dolu1990
c490838202
Added MMU support into cacheless DBus IBus plugins (for testing purposes)
...
Probably full of bugs, need testing
2019-03-18 12:17:43 +01:00
Dolu1990
ffa489d211
hardware refilled MmuPlugin wip
2019-03-17 21:06:47 +01:00
Tom Verbeure
b63395435f
SimpleMul core.
2019-03-16 15:44:18 +00:00
Tom Verbeure
5bc53c08ce
Merge branch 'master' of https://github.com/SpinalHDL/VexRiscv into MulSimple
2019-03-16 15:39:07 +00:00
Dolu1990
03663ce91a
Move unreleased SpinalHDL
2019-03-15 17:35:31 +01:00
Dolu1990
9a61ff8347
Merge remote-tracking branch 'origin/dev'
2019-03-10 11:14:09 +01:00
Dolu1990
2e0b63bc67
SpinalHDL 1.3.2
2019-03-10 11:12:43 +01:00
Dolu1990
bad60f39cd
Fix Decoding benchmark
2019-03-10 11:12:32 +01:00
Dolu1990
434793711b
fix part of #59
2019-02-26 17:26:42 +01:00
Dolu1990
b9922105f0
Fix readme demo path
2019-02-26 17:22:13 +01:00
Dolu1990
e0214056ce
Merge pull request #58 from mithro/patch-1
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Fix image in README.
2019-02-23 09:22:38 +01:00
Tim Ansell
7594cbd902
Fixing images in README in iCE40-hx8k_breakout_board_xip directory too.
2019-02-22 14:57:07 -08:00
Tim Ansell
5c6cc29304
Fixing other image.
2019-02-22 14:55:18 -08:00
Tim Ansell
c9f4a09de0
Fix image in README.
2019-02-22 14:52:09 -08:00
Dolu1990
e0c8ac01d2
Add custom external interrupts
2019-02-03 15:20:34 +01:00
Dolu1990
11f55359c6
IBusCache can now avoid injectorStage in singleStage mode
2019-01-30 01:37:47 +01:00
Dolu1990
56e3321394
cpp regresion now print the time of failure
2019-01-30 01:36:24 +01:00
Dolu1990
285f6bb6ac
Update README.md
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Remove JDK constraints
2019-01-29 12:35:12 +01:00
Dolu1990
f4598fbd0a
Add tightly coupled interface to the i$
2019-01-21 23:46:18 +01:00
Dolu1990
8f1b4cc8e5
Merge branch 'master' into dev
2019-01-16 16:32:12 +01:00
Dolu1990
b5caca54cd
restore all feature in TestsWorkspace
2019-01-16 15:25:50 +01:00
Dolu1990
f4f854ae4f
SpinalHDL 1.3.1
2019-01-14 13:32:16 +01:00
Dolu1990
dcdfa79024
fix run-main into runMain
2019-01-03 20:07:38 +01:00
Dolu1990
414d2aba54
Merge remote-tracking branch 'origin/dev'
2018-12-30 15:54:14 +01:00
Dolu1990
927ab6d127
Merge remote-tracking branch 'origin/master' into dev
2018-12-30 15:53:25 +01:00
Dolu1990
92065a1a10
Update to SpinalHDL 1.3.0
2018-12-30 15:51:46 +01:00
Dolu1990
dd42e30c61
Merge remote-tracking branch 'origin/master' into dev
2018-12-29 14:04:07 +01:00
Dolu1990
d617bafb08
Roll back VexRiscvAvalonForSim to use caches
2018-12-25 00:15:23 +01:00
Dolu1990
1da055dc34
Merge pull request #49 from cutephoton/avalon
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Avalon: Debug Clock Domain for JTAG
2018-12-23 16:27:50 +01:00
Brett Foster
961abb3cf1
Avalon: Debug Clock Domain for JTAG
...
This change ensures that the clock domain for the JTAG interface
uses the debug plugin's domain. Otherwise, resetting the processor
will put the jtag debugger in to reset as well.
See SpinalHDL/VexRiscv#48
2018-12-22 07:58:59 -08:00
Dolu1990
76ebfb2243
Fix machine mode to supervisor delegation
2018-12-10 13:15:03 +01:00
Dolu1990
d9029c2efc
Fix #46 by filling missing return statements
2018-12-10 01:44:47 +01:00
Dolu1990
281d61bbe1
regression fix hex << dec #46
2018-12-09 16:37:16 +01:00
Dolu1990
1fbb81a4d9
regression fix delete [] #46
2018-12-09 15:40:02 +01:00
Dolu1990
cf80c63c22
fix travis
2018-12-08 15:16:17 +01:00
Dolu1990
f121ce1ed5
add sanity asserts in regression #46
2018-12-08 14:10:18 +01:00
Dolu1990
9330945623
fix regression makefile
2018-12-07 23:50:13 +01:00
Dolu1990
52419fd7ad
Regression remove dplus stuff #46
2018-12-07 23:47:49 +01:00
Dolu1990
68fdbe60cc
verilator regression fix missing fclose #46
2018-12-07 23:43:19 +01:00
Dolu1990
6334f430fe
Update README.md
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Fix #44
2018-12-04 19:07:51 +01:00
Dolu1990
eca54585b0
Fix hardware breakpoint
2018-12-04 16:57:24 +01:00
Dolu1990
ac1ed40b80
Move things into SpinalHDL lib
2018-12-01 18:25:18 +01:00
Dolu1990
3d71045159
DebugPlugin doesn't require memory/writeback stage anymore
2018-12-01 18:24:33 +01:00
Dolu1990
58d7a4784d
move HexTools into SpinalHDL lib
2018-11-30 17:39:33 +01:00
Dolu1990
b1b7da4f10
Rename SimpleBus into PipelinedMemoryBus
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Move PipelinedMemoryBus into SpinalHDL lib
2018-11-30 17:37:17 +01:00
Dolu1990
f54865bcb8
Merge remote-tracking branch 'origin/dev'
2018-11-29 22:43:26 +01:00
Dolu1990
2f6a2dfccc
Add configs setup in SimpleBusInterconnect
2018-11-29 16:14:45 +01:00
Dolu1990
7075e08d9f
Hazarplugin tell to branch plugin if the RS are hazardous in the execute stage
2018-11-24 13:38:54 +01:00