Dolu1990
|
f1d64eccc8
|
Fix demo
|
2023-11-03 11:41:16 +01:00 |
|
Dolu1990
|
e6998d1cb3
|
Add GenFullWithOfficialRiscvDebug
|
2023-11-03 10:46:49 +01:00 |
|
Dolu1990
|
11cc9b1cf2
|
Add GenFullWithTcmIntegrated example
|
2023-11-02 12:32:19 +01:00 |
|
Dolu1990
|
0f17b395bd
|
IBusDBusCachedTightlyCoupledRam add missing write mask
|
2023-11-02 11:59:33 +01:00 |
|
Dolu1990
|
281818af9c
|
#373 Add GenFullWithTcm demo
|
2023-10-31 11:05:00 +01:00 |
|
Dolu1990
|
e21dc6cda5
|
litex add hardwarebreapoint parameter
|
2023-09-20 09:08:33 +02:00 |
|
Dolu1990
|
213e4b863a
|
litex add -expose-time
|
2023-09-12 10:40:45 +02:00 |
|
Dolu1990
|
220a2733be
|
litex privileged debug stop time now connect to clint
|
2023-09-08 16:47:54 +02:00 |
|
Dolu1990
|
9fd127d6d9
|
fix naming
|
2023-09-08 16:26:23 +02:00 |
|
Dolu1990
|
73733dd8b1
|
litex privileged debug
|
2023-09-08 16:00:59 +02:00 |
|
Dolu1990
|
3739b9ac88
|
plic update
|
2023-08-29 08:58:48 +02:00 |
|
Charles Papon
|
fd0f23abb6
|
Merge branch master into dev
|
2023-07-11 04:19:06 +08:00 |
|
Dolu1990
|
760a0fced5
|
Update SpinalHDL
|
2023-05-23 18:18:57 +02:00 |
|
Dolu1990
|
b81029f619
|
fix fpu underflow rounding (#343)
|
2023-05-16 16:50:38 +01:00 |
|
Dolu1990
|
ba6dcb1789
|
Add a few privSpec tests
|
2023-04-27 14:56:41 +02:00 |
|
Dolu1990
|
8fc5f35d29
|
DBusCachedPlugin now provide writesPending signal
|
2023-04-24 13:13:55 +02:00 |
|
Dolu1990
|
7649157946
|
d$ toBmb increase aggregation timer
|
2023-04-13 16:52:20 +02:00 |
|
Dolu1990
|
051080e060
|
CsrPlugin now implement dummy HPM
|
2023-04-13 16:51:44 +02:00 |
|
Dolu1990
|
d966c4efe1
|
fix #328 medeleg EBREAK added
|
2023-04-10 13:02:51 +02:00 |
|
Dolu1990
|
320867e135
|
sync
|
2023-04-04 18:11:33 +02:00 |
|
Dolu1990
|
95e61a7951
|
Revert CfuPlugin
|
2023-04-04 11:47:49 +02:00 |
|
Dolu1990
|
cb0bacfce9
|
implement dummy pmp as 1.10 spec says
|
2023-03-31 10:12:52 +02:00 |
|
Dolu1990
|
b4d5a315cf
|
CsrPlugin implement dummy pmp if no pmp is there
|
2023-03-31 10:11:53 +02:00 |
|
Dolu1990
|
9c2e05cce0
|
Ensure that fence.i wait d$ inflight write and reschedule the next instruction
|
2023-03-29 14:56:53 +02:00 |
|
Dolu1990
|
e357420d11
|
CsrPluginConfig more var
|
2023-03-29 11:10:51 +02:00 |
|
Dolu1990
|
a33380894c
|
sync
|
2023-03-27 09:57:55 +02:00 |
|
Dolu1990
|
e754c5c3a0
|
cleanup IBusDBusCachedTightlyCoupledRam
|
2023-03-27 08:23:32 +02:00 |
|
Dolu1990
|
eeb65ed1c0
|
VexRiscvBmbGenrator now use relaxedReset
|
2023-03-24 08:39:07 +01:00 |
|
Dolu1990
|
c69852c0cc
|
ClockDomainResetGeneratorIf introduction
|
2023-03-23 16:57:10 +01:00 |
|
Dolu1990
|
8195bec788
|
privSpec now check FPU dirty flag
|
2023-03-23 11:24:38 +01:00 |
|
Dolu1990
|
8c5071ce42
|
VexRiscvSmpCluster fullCsr improvement
|
2023-03-23 08:53:41 +01:00 |
|
Dolu1990
|
b01490b5f3
|
Implement counteren (1.10+ spec)
|
2023-03-23 08:53:10 +01:00 |
|
Dolu1990
|
570720fdd8
|
Cfu add enableInit option
|
2023-03-22 17:13:47 +01:00 |
|
Dolu1990
|
0e59a56bd1
|
add privSpec test
|
2023-03-22 16:25:23 +01:00 |
|
Dolu1990
|
bba022b746
|
fix a few csr related WARL (minor)
|
2023-03-22 16:25:03 +01:00 |
|
Dolu1990
|
385a195d16
|
few more var parameters
|
2023-03-22 12:58:43 +01:00 |
|
Dolu1990
|
a755d839b3
|
Add VexRiscvSmpClusterGen csrFull (wip)
|
2023-03-22 11:07:18 +01:00 |
|
Dolu1990
|
5b47564024
|
A few plugins config are now var
|
2023-03-22 11:06:56 +01:00 |
|
Dolu1990
|
4972a27ae9
|
More verbose main.cpp on failure, fix C.ADDSP regfile initialisation
|
2023-03-22 11:06:23 +01:00 |
|
Charles Papon
|
0aa8cb11e0
|
BranchPlugin do not use casez anymore
|
2023-03-15 17:43:44 +08:00 |
|
Charles Papon
|
13061b8b2e
|
debug unavailable is now BufferCC
|
2023-03-15 09:50:09 +08:00 |
|
Charles Papon
|
876222d886
|
Fix FPU access port instanciation when not needed
|
2023-03-14 15:23:04 +08:00 |
|
Charles Papon
|
25eda80fee
|
FpuTest document how to install berkley testfloat
|
2023-03-10 14:46:21 +08:00 |
|
Charles Papon
|
94f19032f0
|
FpuPlugin.access port added
Privileged debug access added
|
2023-03-10 14:44:14 +08:00 |
|
Charles Papon
|
6be1531d36
|
Fpu will not trap anymore on debug access if fs==0
|
2023-03-10 09:17:01 +08:00 |
|
Charles Papon
|
1179c6551f
|
Fix #321 #322 #333 FPU precision removal
|
2023-03-08 16:00:22 +08:00 |
|
Charles Papon
|
f11c642cd6
|
CfuPlugin encoding can now specify cmd/rsp less instruction
|
2023-03-07 16:49:07 +08:00 |
|
Charles Papon
|
3cf8508db1
|
DBus coupled timings improvement
|
2023-03-05 20:31:40 +08:00 |
|
Charles Papon
|
153445ff21
|
Fix CFU / FPU decoder stage fork on illegal instruction
|
2023-03-05 20:29:53 +08:00 |
|
Dolu1990
|
cf70bc6b1f
|
fix last push
|
2023-03-03 14:20:12 +01:00 |