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Sylvain Munaut b3caabcca3 di_adrv2crr_fmc: Bump PCIe to 8 lanes 
There used to be an issue with 8 lanes litepcie USP for that board
when it was first added, but it's been solved now, so might as well
use all the available lanes

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 		2024-02-05 11:43:02 +01:00
..
__init__.py Move import Compat directly to litex_boards.__init__.py and simplify. 2021-03-25 16:47:47 +01:00
adi_adrv2crr_fmc.py di_adrv2crr_fmc: Bump PCIe to 8 lanes 2024-02-05 11:43:02 +01:00
adi_plutosdr.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
alchitry_au.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
alchitry_cu.py targets: +x on alchitry_cu and vcu128. 2023-07-06 13:29:35 +02:00
alchitry_mojo.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
aliexpress_xc7k70t.py aliexpress_xc7k70t: Review/Cleanup. 2023-11-09 08:26:06 +01:00
aliexpress_xc7k420t.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
alinx_ax7010.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
alinx_axau15.py alinx_axau15/PCIe: Switch to Gen3/128-bit for now (configuration used on others Ultrascale+ Gen3 X4 boards). 2023-12-28 19:56:52 +01:00
alinx_axu2cga.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
analog_pocket.py target/analog_pocket: Remove debug (Will be investigated externally). 2023-10-27 15:32:36 +02:00
antmicro_artix_dc_scm.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
antmicro_datacenter_ddr4_test_board.py target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally 2023-10-23 17:43:13 +02:00
antmicro_lpddr4_test_board.py target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally 2023-10-23 17:43:13 +02:00
antmicro_sdi_mipi_video_converter.py targets/CRG: Add rst signal when missing. 2023-07-26 16:56:27 +02:00
arduino_mkrvidor4000.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
avnet_aesku40.py avnet_aesku40: Expose ethernet/etherbone parameters. 2023-06-13 09:26:07 +02:00
berkeleylab_marble.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
camlink_4k.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
colorlight_5a_75x.py target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally 2023-10-23 17:43:13 +02:00
colorlight_i5.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
colorlight_i9plus.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
decklink_intensity_pro_4k.py targets/CRG: Add rst signal when missing. 2023-07-26 16:56:27 +02:00
decklink_mini_4k.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
decklink_quad_hdmi_recorder.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
digilent_arty.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
digilent_arty_s7.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
digilent_arty_z7.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
digilent_atlys.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
digilent_basys3.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
digilent_cmod_a7.py Fix Digilent Cmod A7 ISSIRAM reading 2023-08-05 19:56:32 +02:00
digilent_genesys2.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
digilent_nexys4.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
digilent_nexys4ddr.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
digilent_nexys_video.py targets/digilent_nexys_video: Use reset_buf on sys_clk's create_clkout to improve timings and demonstrate use. 2023-11-07 13:22:30 +01:00
digilent_pynq_z1.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
digilent_zedboard.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
ebaz4205.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
efinix_t8f81_dev_kit.py targets/CRG: Add rst signal when missing. 2023-07-26 16:56:27 +02:00
efinix_titanium_ti60_f225_dev_kit.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
efinix_trion_t20_bga256_dev_kit.py targets/CRG: Add rst signal when missing. 2023-07-26 16:56:27 +02:00
efinix_trion_t20_mipi_dev_kit.py targets/CRG: Add rst signal when missing. 2023-07-26 16:56:27 +02:00
efinix_trion_t120_bga576_dev_kit.py targets/efinix: Now rely in LiteX to automatically exclude Tristate IOs. 2023-08-30 09:59:23 +02:00
efinix_xyloni_dev_kit.py targets/CRG: Add rst signal when missing. 2023-07-26 16:56:27 +02:00
ego1.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
enclustra_mercury_kx2.py copyright notices on enclustra 2023-04-11 10:29:52 +07:00
enclustra_mercury_xu5.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
fairwaves_xtrx.py targets/CRG: Add rst signal when missing. 2023-07-26 16:56:27 +02:00
fpc_iii.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
fpgawars_alhambra2.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
gadgetfactory_papilio_pro.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
gsd_butterstick.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
gsd_orangecrab.py global: Use new WaitTimer integrated cast to int. 2023-08-01 14:56:35 +02:00
hackaday_hadbadge.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
ice_v_wireless.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
icebreaker.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
icebreaker_bitsy.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
isx_im1283.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
jungle_electronics_fireant.py targets/CRG: Add rst signal when missing. 2023-07-26 16:56:27 +02:00
kosagi_fomu.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
kosagi_netv2.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
krtkl_snickerdoodle.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
lambdaconcept_ecpix5.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
lattice_crosslink_nx_evn.py target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally 2023-10-23 17:43:13 +02:00
lattice_crosslink_nx_vip.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
lattice_ecp5_evn.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
lattice_ecp5_vip.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
lattice_ice40up5k_evn.py target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally 2023-10-23 17:43:13 +02:00
lattice_versa_ecp5.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
limesdr_mini_v2.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
linsn_rv901t.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
litex_acorn_baseboard.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
logicbone.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
machdyne_konfekt.py targets/machdyne: Switch to LiteXModule for consistency with other targets. 2023-02-23 09:07:06 +01:00
machdyne_kopflos.py targets/machdyne: Switch to LiteXModule for consistency with other targets. 2023-02-23 09:07:06 +01:00
machdyne_krote.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
machdyne_minze.py add support for minze board 2023-12-29 06:01:59 +01:00
machdyne_mozart_ml1.py add support for mozart ml1 2023-12-19 22:18:21 +01:00
machdyne_noir.py targets/machdyne: Switch to LiteXModule for consistency with other targets. 2023-02-23 09:07:06 +01:00
machdyne_schoko.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
micronova_mercury2.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
mist.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
mnt_rkx7.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
muselab_icesugar.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
muselab_icesugar_pro.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
myminieye_runber.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
newae_cw305.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
numato_aller.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
numato_mimas_a7.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
numato_nereid.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
numato_tagus.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
ocp_tap_timecard.py targets/pcie: Update Xilinx S7 constraints. 2023-03-06 12:20:34 +01:00
opalkelly_xem8320.py opalkelly_xem8320: Review and update to recent LiteX changes. 2023-03-01 09:16:51 +01:00
pano_logic_g2.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
qmtech_5cefa2.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
qmtech_5cefa5.py targets/qmtech: Add missing +x. 2023-05-12 12:09:20 +02:00
qmtech_10cl006.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
qmtech_artix7_fbg484.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
qmtech_artix7_fgg676.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
qmtech_ep4ce15_starter_kit.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
qmtech_ep4cex5.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
qmtech_ep4cgx150.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
qmtech_wukong.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
qmtech_xc7a35t.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
qmtech_xc7k325t.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
quicklogic_quickfeather.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
qwertyembedded_beaglewire.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
radiona_ulx3s.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
radiona_ulx4m_ld_v2.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
rcs_arctic_tern_bmc_card.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
redpitaya.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
rz_easyfpga.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
saanlima_pipistrello.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
scarabhardware_minispartan6.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
seeedstudio_spartan_edge_accelerator.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
siglent_sds1104xe.py targets/siglent_sds1104xe: Update with new LiteX Ethernet/Etherbone integration. 2023-11-13 09:02:09 +01:00
simple.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
sipeed_tang_mega_138k.py sipeed_tang_mega_138k: Fix build with ethernet and local/remote ip indent. 2024-01-22 13:20:07 +01:00
sipeed_tang_nano.py target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally 2023-10-23 17:43:13 +02:00
sipeed_tang_nano_4k.py sipeed_tang_nano_4k: Switch to LiteX's UART and expose hyperram parameter. 2024-01-11 13:54:44 +01:00
sipeed_tang_nano_9k.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
sipeed_tang_nano_20k.py fix help text 2023-10-12 11:21:20 -04:00
sipeed_tang_primer.py targets/CRG: Add rst signal when missing. 2023-07-26 16:56:27 +02:00
sipeed_tang_primer_20k.py sipeed_tang_primer_20k: Fix DDR3 module, SoC reset and remove DDR3 debug code. 2023-08-29 16:50:17 +02:00
sipeed_tang_primer_25k.py sipeed_tang_primer_25k: new board 2023-10-17 07:45:40 +02:00
sitlinv_a_e115fb.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
sitlinv_stlv7325_v1.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
sitlinv_stlv7325_v2.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
sitlinv_xc7k420t.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
sqrl_acorn.py targets/sqrl_acorn: Drive pcie_clkreq_n (Thanks @myftptoyman). 2023-09-27 11:06:50 +02:00
sqrl_fk33.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
sqrl_xcu1525.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
terasic_de0nano.py targets: Switch to openocd_usb_blaster/2.cfg. 2023-09-21 09:16:24 +02:00
terasic_de1soc.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
terasic_de2_115.py terasic_de2_115: Cosmetic cleanup. 2023-11-06 19:21:53 +01:00
terasic_de10lite.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
terasic_de10nano.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
terasic_deca.py target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally 2023-10-23 17:43:13 +02:00
terasic_sockit.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
tinyfpga_bx.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
trellisboard.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
trenz_c10lprefkit.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
trenz_cyc1000.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
trenz_max1000.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
trenz_te0725.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
trenz_tec0117.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
tul_pynq_z2.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
xilinx_ac701.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
xilinx_alveo_u200.py Fix Memory initialization of Alveo U200 failed #1606 2023-04-17 18:59:50 +07:00
xilinx_alveo_u250.py Fix Memory test failure of Alveo U250 2023-04-24 17:35:58 +09:00
xilinx_alveo_u280.py target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally 2023-10-23 17:16:57 +02:00
xilinx_kc705.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
xilinx_kcu105.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
xilinx_kv260.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
xilinx_vc707.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
xilinx_vcu118.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
xilinx_vcu128.py targets: +x on alchitry_cu and vcu128. 2023-07-06 13:29:35 +02:00
xilinx_zcu102.py targets/xilinx_zcu102: Add litedram to the target. 2023-10-14 00:00:26 +09:00
xilinx_zcu104.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
xilinx_zcu106.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
xilinx_zcu216.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
xilinx_zybo_z7.py targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
ztex213.py targets/CRG: Add rst signal when missing. 2023-07-26 16:56:27 +02:00