.. |
__init__.py
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Move import Compat directly to litex_boards.__init__.py and simplify.
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2021-03-25 16:47:47 +01:00 |
adi_adrv2crr_fmc.py
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di_adrv2crr_fmc: Bump PCIe to 8 lanes
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2024-02-05 11:43:02 +01:00 |
adi_plutosdr.py
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target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
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2023-10-23 17:16:57 +02:00 |
alchitry_au.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
alchitry_cu.py
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targets: +x on alchitry_cu and vcu128.
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2023-07-06 13:29:35 +02:00 |
alchitry_mojo.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
aliexpress_xc7k70t.py
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aliexpress_xc7k70t: Review/Cleanup.
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2023-11-09 08:26:06 +01:00 |
aliexpress_xc7k420t.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
alinx_ax7010.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
alinx_axau15.py
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alinx_axau15: Add manual loc constraints on PCIe GTHE4 channels to avoid Vivado to remap them.
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2024-03-26 14:12:26 +01:00 |
alinx_axu2cga.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
analog_pocket.py
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target/analog_pocket: Remove debug (Will be investigated externally).
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2023-10-27 15:32:36 +02:00 |
antmicro_artix_dc_scm.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
antmicro_datacenter_ddr4_test_board.py
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target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally
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2023-10-23 17:43:13 +02:00 |
antmicro_lpddr4_test_board.py
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target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally
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2023-10-23 17:43:13 +02:00 |
antmicro_sdi_mipi_video_converter.py
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targets/CRG: Add rst signal when missing.
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2023-07-26 16:56:27 +02:00 |
arduino_mkrvidor4000.py
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target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
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2023-10-23 17:16:57 +02:00 |
avnet_aesku40.py
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avnet_aesku40: Expose ethernet/etherbone parameters.
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2023-06-13 09:26:07 +02:00 |
berkeleylab_marble.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
camlink_4k.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
colognechip_gatemate_evb.py
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adding colognechip_gatemate_evb
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2024-02-28 17:27:21 +01:00 |
colorlight_5a_75x.py
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target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally
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2023-10-23 17:43:13 +02:00 |
colorlight_i5.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
colorlight_i9plus.py
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target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
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2023-10-23 17:16:57 +02:00 |
decklink_intensity_pro_4k.py
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targets/CRG: Add rst signal when missing.
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2023-07-26 16:56:27 +02:00 |
decklink_mini_4k.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
decklink_quad_hdmi_recorder.py
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target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
|
2023-10-23 17:16:57 +02:00 |
digilent_arty.py
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targets/digilent_arty: Allow --with-ethernet and --with-etherbone and remove --with-hybrid.
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2024-02-26 15:56:58 +01:00 |
digilent_arty_s7.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
digilent_arty_z7.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
digilent_atlys.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
digilent_basys3.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
digilent_cmod_a7.py
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Fix Digilent Cmod A7 ISSIRAM reading
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2023-08-05 19:56:32 +02:00 |
digilent_genesys2.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
digilent_nexys4.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
digilent_nexys4ddr.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
digilent_nexys_video.py
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targets/digilent_nexys_video: Use reset_buf on sys_clk's create_clkout to improve timings and demonstrate use.
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2023-11-07 13:22:30 +01:00 |
digilent_pynq_z1.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
digilent_zedboard.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
ebaz4205.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
efinix_t8f81_dev_kit.py
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targets/CRG: Add rst signal when missing.
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2023-07-26 16:56:27 +02:00 |
efinix_titanium_ti60_f225_dev_kit.py
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target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
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2023-10-23 17:16:57 +02:00 |
efinix_trion_t20_bga256_dev_kit.py
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targets/CRG: Add rst signal when missing.
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2023-07-26 16:56:27 +02:00 |
efinix_trion_t20_mipi_dev_kit.py
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targets/CRG: Add rst signal when missing.
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2023-07-26 16:56:27 +02:00 |
efinix_trion_t120_bga576_dev_kit.py
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targets/efinix: Now rely in LiteX to automatically exclude Tristate IOs.
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2023-08-30 09:59:23 +02:00 |
efinix_xyloni_dev_kit.py
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targets/CRG: Add rst signal when missing.
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2023-07-26 16:56:27 +02:00 |
ego1.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
enclustra_mercury_kx2.py
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copyright notices on enclustra
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2023-04-11 10:29:52 +07:00 |
enclustra_mercury_xu5.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
fairwaves_xtrx.py
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targets/CRG: Add rst signal when missing.
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2023-07-26 16:56:27 +02:00 |
fpc_iii.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
fpgawars_alhambra2.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
gadgetfactory_papilio_pro.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
gsd_butterstick.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
gsd_orangecrab.py
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gsd_orangecrab: Add --without_dfu_rst argument to allow disabling reset to DFU on Button press.
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2024-03-11 17:23:42 +01:00 |
hackaday_hadbadge.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
ice_v_wireless.py
|
targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
icebreaker.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
icebreaker_bitsy.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
isx_im1283.py
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target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
|
2023-10-23 17:16:57 +02:00 |
jungle_electronics_fireant.py
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targets/CRG: Add rst signal when missing.
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2023-07-26 16:56:27 +02:00 |
kosagi_fomu.py
|
targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
kosagi_netv2.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
krtkl_snickerdoodle.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
lambdaconcept_ecpix5.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
lattice_crosslink_nx_evn.py
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target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally
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2023-10-23 17:43:13 +02:00 |
lattice_crosslink_nx_vip.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
lattice_ecp5_evn.py
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target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
|
2023-10-23 17:16:57 +02:00 |
lattice_ecp5_vip.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
lattice_ice40up5k_evn.py
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target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally
|
2023-10-23 17:43:13 +02:00 |
lattice_versa_ecp5.py
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targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
limesdr_mini_v2.py
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target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
|
2023-10-23 17:16:57 +02:00 |
linsn_rv901t.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
litex_acorn_baseboard.py
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targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
litex_acorn_baseboard_mini.py
|
targets/litex_acorn_baseboard_mini: Add with_dram parameter to allow build without DRAM.
|
2024-03-07 18:30:18 +01:00 |
logicbone.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
machdyne_konfekt.py
|
targets/machdyne: Switch to LiteXModule for consistency with other targets.
|
2023-02-23 09:07:06 +01:00 |
machdyne_kopflos.py
|
targets/machdyne: Switch to LiteXModule for consistency with other targets.
|
2023-02-23 09:07:06 +01:00 |
machdyne_krote.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
machdyne_minze.py
|
add support for minze board
|
2023-12-29 06:01:59 +01:00 |
machdyne_mozart_ml1.py
|
add support for mozart ml1
|
2023-12-19 22:18:21 +01:00 |
machdyne_noir.py
|
targets/machdyne: Switch to LiteXModule for consistency with other targets.
|
2023-02-23 09:07:06 +01:00 |
machdyne_schoko.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
micronova_mercury2.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
mist.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
mnt_rkx7.py
|
target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
|
2023-10-23 17:16:57 +02:00 |
muselab_icesugar.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
muselab_icesugar_pro.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
myminieye_runber.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
newae_cw305.py
|
target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
|
2023-10-23 17:16:57 +02:00 |
numato_aller.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
numato_mimas_a7.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
numato_nereid.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
numato_tagus.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
ocp_tap_timecard.py
|
targets/pcie: Update Xilinx S7 constraints.
|
2023-03-06 12:20:34 +01:00 |
olimex_gatemate_a1_evb.py
|
Olimex GateMate A1 EVB: new Board
|
2024-03-02 12:23:27 +01:00 |
opalkelly_xem8320.py
|
opalkelly_xem8320: Review and update to recent LiteX changes.
|
2023-03-01 09:16:51 +01:00 |
pano_logic_g2.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
qmtech_5cefa2.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
qmtech_5cefa5.py
|
targets/qmtech: Add missing +x.
|
2023-05-12 12:09:20 +02:00 |
qmtech_10cl006.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
qmtech_artix7_fbg484.py
|
target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
|
2023-10-23 17:16:57 +02:00 |
qmtech_artix7_fgg676.py
|
target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
|
2023-10-23 17:16:57 +02:00 |
qmtech_ep4ce15_starter_kit.py
|
target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
|
2023-10-23 17:16:57 +02:00 |
qmtech_ep4cex5.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
qmtech_ep4cgx150.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
qmtech_kintex7_devboard.py
|
target/qmtech_kintex7_devboard: +X.
|
2024-02-26 15:41:09 +01:00 |
qmtech_wukong.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
qmtech_xc7a35t.py
|
target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
|
2023-10-23 17:16:57 +02:00 |
qmtech_xc7k325t.py
|
QMTech XC7K325T: use the buttons on the core board
|
2024-02-28 04:40:17 +07:00 |
quicklogic_quickfeather.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
qwertyembedded_beaglewire.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
radiona_ulx3s.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
radiona_ulx4m_ld_v2.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
rcs_arctic_tern_bmc_card.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
redpitaya.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
rz_easyfpga.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
saanlima_pipistrello.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
scarabhardware_minispartan6.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
seeedstudio_spartan_edge_accelerator.py
|
target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
|
2023-10-23 17:16:57 +02:00 |
siglent_sds1104xe.py
|
targets/siglent_sds1104xe.py: added note on how to use crossover with jtagbone
|
2024-03-20 16:58:38 +01:00 |
simple.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
sipeed_tang_mega_138k_pro.py
|
Rename sipeed_tang_mega_138k.py to sipeed_tang_mega_138k_pro.py
|
2024-03-19 17:21:21 +08:00 |
sipeed_tang_nano.py
|
target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally
|
2023-10-23 17:43:13 +02:00 |
sipeed_tang_nano_4k.py
|
sipeed_tang_nano_4k: Switch to LiteX's UART and expose hyperram parameter.
|
2024-01-11 13:54:44 +01:00 |
sipeed_tang_nano_9k.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
sipeed_tang_nano_20k.py
|
fix help text
|
2023-10-12 11:21:20 -04:00 |
sipeed_tang_primer.py
|
targets/CRG: Add rst signal when missing.
|
2023-07-26 16:56:27 +02:00 |
sipeed_tang_primer_20k.py
|
sipeed_tang_primer_20k: Fix DDR3 module, SoC reset and remove DDR3 debug code.
|
2023-08-29 16:50:17 +02:00 |
sipeed_tang_primer_25k.py
|
sipeed_tang_primer_25k: new board
|
2023-10-17 07:45:40 +02:00 |
sitlinv_a_e115fb.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
sitlinv_stlv7325_v1.py
|
target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
|
2023-10-23 17:16:57 +02:00 |
sitlinv_stlv7325_v2.py
|
target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
|
2023-10-23 17:16:57 +02:00 |
sitlinv_xc7k420t.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
sqrl_acorn.py
|
targets/sqrl_acorn: Drive pcie_clkreq_n (Thanks @myftptoyman).
|
2023-09-27 11:06:50 +02:00 |
sqrl_fk33.py
|
target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
|
2023-10-23 17:16:57 +02:00 |
sqrl_xcu1525.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
terasic_de0nano.py
|
targets: Switch to openocd_usb_blaster/2.cfg.
|
2023-09-21 09:16:24 +02:00 |
terasic_de1soc.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
terasic_de2_115.py
|
terasic_de2_115: Cosmetic cleanup.
|
2023-11-06 19:21:53 +01:00 |
terasic_de10lite.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
terasic_de10nano.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
terasic_deca.py
|
target/xxx: remove with-uartbone, add_uartbone and deal with case where uartbone is required inconditionnally
|
2023-10-23 17:43:13 +02:00 |
terasic_sockit.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
tinyfpga_bx.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
trellisboard.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
trenz_c10lprefkit.py
|
targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
trenz_cyc1000.py
|
targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
trenz_max1000.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
trenz_te0725.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
trenz_tec0117.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
tul_pynq_z2.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
xilinx_ac701.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
xilinx_alveo_u200.py
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Fix Memory initialization of Alveo U200 failed #1606
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2023-04-17 18:59:50 +07:00 |
xilinx_alveo_u250.py
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Fix Memory test failure of Alveo U250
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2023-04-24 17:35:58 +09:00 |
xilinx_alveo_u280.py
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target/xxx: remove with-jtagbone, add_jtagbone and deal with case where jtagbone is required inconditionnally
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2023-10-23 17:16:57 +02:00 |
xilinx_kc705.py
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targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
xilinx_kcu105.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
xilinx_kv260.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
xilinx_vc707.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
xilinx_vcu118.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
xilinx_vcu128.py
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targets: +x on alchitry_cu and vcu128.
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2023-07-06 13:29:35 +02:00 |
xilinx_zc706.py
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xilinx_zc706: Add Ethernet/Etherbone support through SFP/K7_1000BaseX (Untested on hardware).
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2024-03-26 21:53:45 +01:00 |
xilinx_zcu102.py
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targets/xilinx_zcu102: Add litedram to the target.
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2023-10-14 00:00:26 +09:00 |
xilinx_zcu104.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
xilinx_zcu106.py
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targets: Import all from litex.gen on all targets.
|
2023-02-23 09:09:33 +01:00 |
xilinx_zcu216.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
xilinx_zybo_z7.py
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targets: Import all from litex.gen on all targets.
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2023-02-23 09:09:33 +01:00 |
ztex213.py
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targets/CRG: Add rst signal when missing.
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2023-07-26 16:56:27 +02:00 |