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1266 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 36f4b68dd8 mibuild/sim: style fixes 2015-03-02 21:56:20 +00:00
Florent Kermarrec 7d68ecbd86 move dma_lasmi to MiSoC 2015-03-02 08:23:02 +01:00
Florent Kermarrec 58290f3c43 lasmi: simplify usage for the user (it's the job of the controller to manage write/read latencies on acks) 2015-03-01 22:04:20 +01:00
Florent Kermarrec 382ca374c3 mibuild: initial Verilator support 2015-03-01 18:27:46 +01:00
Florent Kermarrec 8f81ae6826 genlib/misc: add FlipFlop, Counter, Timeout 2015-03-01 16:33:46 +01:00
Sebastien Bourdeauducq 961b4bfb4c platforms/pipistrello: remove unconnected SDRAM pins 2015-02-28 16:20:44 -07:00
Robert Jordens 03431ece9f pipistrello: fix ddram dqs, cleanup constraints, add pullup/downs 2015-02-28 16:16:47 -07:00
Robert Jordens 75290aa0f3 pipistrello: switch back to xc3sprog and fast (papilio) speed 2015-02-28 16:16:47 -07:00
Florent Kermarrec eb8ba145de kx705: add programmer parameter 2015-02-28 23:34:57 +01:00
Florent Kermarrec b53e2b0d6e fix xilinx/programmer with Vivado 2015-02-28 19:33:20 +01:00
Florent Kermarrec 87d8ff2de7 xilinx/programmer: add source of vivado's settings (need to be tested on a linux machine) 2015-02-28 03:38:47 +01:00
Florent Kermarrec e82531cdf8 move dfi/lasmibus/wishbone2lasmi to MiSoC sdram 2015-02-27 16:54:22 +01:00
Florent Kermarrec 225a2d4704 report cachesize in wishbone2lasmi 2015-02-27 14:12:13 +01:00
Florent Kermarrec 54a8a52e90 xilinx/programmer: add partial flash_bitstream for vivado (can flash full bitstream, need to be adapted to flash part of the flash (bios, ...)) 2015-02-27 09:05:23 +01:00
Robert Jordens 2b0937153d xilinx/programmer: fix xc3sprog (GenericProgrammer) 2015-02-26 21:36:15 -07:00
Robert Jordens 8de5b947bd pipistrello: use fpgaprog 2015-02-26 21:34:02 -07:00
Robert Jordens ca52aa5b8c add fpgaprog programmer 2015-02-26 21:33:49 -07:00
Robert Jordens 5b5d2d15b8 add pipistrello platform 2015-02-26 21:33:42 -07:00
Sebastien Bourdeauducq ba26a400e3 Merge branch 'master' of https://github.com/m-labs/migen 2015-02-26 21:32:39 -07:00
Sebastien Bourdeauducq 28c219ebd2 platforms/kc705: add user SMA clock 2015-02-26 16:22:22 -07:00
Yann Sionneau dbdb263acc mibuild/kc705: add missing pins on FMC LPC 2015-02-26 15:54:41 -07:00
Florent Kermarrec 8da1faf310 mibuild: move identifier to platforms 2015-02-26 19:00:43 +01:00
Florent Kermarrec e6a21b2305 mibuild: fix missing xilinx_common -->xilinx.common change 2015-02-26 14:04:36 +01:00
Florent Kermarrec bd5ed0977b platforms: add default_clk_freq/default_clk_name (to use it on simple designs to test MiSOC on various platforms) 2015-02-26 12:51:57 +01:00
Florent Kermarrec e27a94e7fc mibuild: add VivadoProgrammer (only load_bitstream) 2015-02-26 12:31:19 +01:00
Florent Kermarrec b3faf5f0da mibuild: better file organization (create directory for each vendor and move programmers in it) 2015-02-26 12:25:59 +01:00
Yann Sionneau 5bb1c789aa mibuild/kc705: add FMC connectors 2015-02-18 08:32:45 -07:00
Yann Sionneau cea1551ae0 mibuild: support pin names in IO extensions 2015-02-18 08:32:31 -07:00
Florent Kermarrec 452c60e0c3 endpoints: add param_layout parameter (required to pass parameter data with converters and will allow logic optimizations) 2015-02-14 03:10:56 -08:00
Florent Kermarrec 319465445d actorlib/structuring: fix eop generation in Pack 2015-02-14 03:07:18 -08:00
Sebastien Bourdeauducq d51d33af73 mibuild: make resolve_signals public 2015-02-14 03:05:07 -08:00
Florent Kermarrec beef7425ce mibuild: return verilog namespace with build 2015-02-14 03:02:47 -08:00
Florent Kermarrec c7eba8f4c4 remove crc since each crc is specific. It's probably better to adapt code for each case. 2015-02-14 03:01:12 -08:00
Florent Kermarrec 7471b2a152 genlib/crc: use OrderedDict 2015-01-23 00:23:41 +08:00
Florent Kermarrec 2175a79c03 fhdl/std: add FinalizeError import 2015-01-23 00:23:41 +08:00
Sebastien Bourdeauducq 6fca1dd4dc mibuild/xilinx_vivado: fix list aliasing problem 2014-12-21 17:37:11 +08:00
Florent Kermarrec 8576b91290 xilinx_vivado: add parameters to pass specific commands (to be declared in platforms) 2014-12-21 17:35:42 +08:00
Florent Kermarrec 037ea05b1e crc: modify CRCChecker to remove CRC and clean up 2014-12-21 17:24:52 +08:00
Sebastien Bourdeauducq ae770c0f8c bank: support direct mapping of CSRs on Wishbone 2014-11-30 22:28:39 +08:00
Yann Sionneau ee928a8973 Wishbone DownConverter: Fix sel signal 2014-11-26 19:33:12 +08:00
Sebastien Bourdeauducq 4542de2c11 genlib/fsm: add NextValue to replace reg/reg_next/ce pattern 2014-11-25 17:16:21 +08:00
Sebastien Bourdeauducq 5801e5746b fhdl/tools: do not attempt to rename sync clock domain if it does not exist 2014-11-21 14:51:05 -08:00
Sebastien Bourdeauducq eb47f458dd flow: endpoint description structure with packetized parameter 2014-11-20 22:31:56 -08:00
Sebastien Bourdeauducq f5fc4b365f actorlib/fifo: add buffered parameter 2014-11-20 18:46:54 -08:00
Florent Kermarrec b87ad1af63 xilinx_vivado: use REM for comment on Windows 2014-11-20 15:27:14 -08:00
Sébastien Bourdeauducq 866757f80e Merge pull request #8 from jix/fix-acitorlib-fifo 
actorlib/fifo: fix no-op assignment due to .payload omission
 2014-11-16 21:48:12 -07:00
Jannis Harder f847faf004 actorlib/fifo: fix no-op assignment due to .payload omission 2014-11-14 21:25:19 +01:00
Guy Hutchison 9f2f8d279d add hamming-code gen/check lib 2014-11-06 18:19:59 -08:00
Sebastien Bourdeauducq dff3a17711 mibuild/programmer: add migen folders to flash proxy search dirs 2014-11-05 23:23:22 +08:00
Sebastien Bourdeauducq 7d15e91e26 vpi/ipc: fix decoding of index buffer 2014-11-04 16:57:34 +08:00