Florent Kermarrec
|
9326985e05
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update LiteScope
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2015-02-18 16:53:02 +01:00 |
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Florent Kermarrec
|
e6f1bdb152
|
update LiteScope
|
2015-02-18 16:51:35 +01:00 |
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Florent Kermarrec
|
6bfd5ce1d8
|
split host files since we now have more drivers/dumps supported
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2015-02-18 16:49:38 +01:00 |
|
Florent Kermarrec
|
08935dce9a
|
make.py: add powered by Migen
|
2015-02-18 16:39:18 +01:00 |
|
Florent Kermarrec
|
e17791a85b
|
readme/make.py: add powered by Migen
|
2015-02-18 16:38:48 +01:00 |
Yann Sionneau
|
5bb1c789aa
|
mibuild/kc705: add FMC connectors
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2015-02-18 08:32:45 -07:00 |
|
Yann Sionneau
|
cea1551ae0
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mibuild: support pin names in IO extensions
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2015-02-18 08:32:31 -07:00 |
|
Florent Kermarrec
|
2f6465d439
|
add sigrok import (to check export against it)
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2015-02-18 15:23:04 +01:00 |
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Florent Kermarrec
|
130212039e
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continue sigrok export (should almost work)
|
2015-02-18 11:59:35 +01:00 |
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Florent Kermarrec
|
cd43163d9d
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add sigrok export skeleton (wip)
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2015-02-18 00:44:33 +01:00 |
|
Florent Kermarrec
|
70f94ea0eb
|
logo : add powered by Migen
|
2015-02-17 23:17:46 +01:00 |
|
Florent Kermarrec
|
89eaef0e43
|
logo : add powered by Migen
|
2015-02-17 23:16:06 +01:00 |
|
Florent Kermarrec
|
5830575797
|
logo : add powered by Migen
|
2015-02-17 23:14:21 +01:00 |
|
Florent Kermarrec
|
79a7f9ecb8
|
create BaseSoC as a basic example design and build UDPSoC/EtherboneSoC on top of it
|
2015-02-17 12:37:17 +01:00 |
|
Florent Kermarrec
|
eeaf03669a
|
test: we can now test regs with Etherbone
|
2015-02-17 01:15:06 +01:00 |
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Florent Kermarrec
|
a5416fa864
|
host: add Etherbone driver
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2015-02-17 01:09:53 +01:00 |
|
Florent Kermarrec
|
1a3183c15d
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etherbone: fix addressing
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2015-02-17 00:02:49 +01:00 |
|
Florent Kermarrec
|
67958f7448
|
mac: fix missing core csr generation
|
2015-02-16 14:44:36 +01:00 |
|
Florent Kermarrec
|
da13bd536e
|
gensoc: add csr_data_width and csr_address_width as parameters In some case we want to have mode than 32 CSR or and csr_data_width != 8
|
2015-02-14 03:24:23 -08:00 |
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Florent Kermarrec
|
452c60e0c3
|
endpoints: add param_layout parameter (required to pass parameter data with converters and will allow logic optimizations)
|
2015-02-14 03:10:56 -08:00 |
|
Florent Kermarrec
|
319465445d
|
actorlib/structuring: fix eop generation in Pack
|
2015-02-14 03:07:18 -08:00 |
Sebastien Bourdeauducq
|
d51d33af73
|
mibuild: make resolve_signals public
|
2015-02-14 03:05:07 -08:00 |
|
Florent Kermarrec
|
beef7425ce
|
mibuild: return verilog namespace with build
|
2015-02-14 03:02:47 -08:00 |
|
Florent Kermarrec
|
c7eba8f4c4
|
remove crc since each crc is specific. It's probably better to adapt code for each case.
|
2015-02-14 03:01:12 -08:00 |
|
Florent Kermarrec
|
3559de9b4c
|
add setup.py
|
2015-02-14 02:44:39 -08:00 |
|
Florent Kermarrec
|
d3cf2594f2
|
update download instructions
|
2015-02-12 22:03:24 +01:00 |
|
Florent Kermarrec
|
b64dba7a81
|
update download instructions
|
2015-02-12 22:03:04 +01:00 |
|
Florent Kermarrec
|
aedc964908
|
update download instructions
|
2015-02-12 22:02:50 +01:00 |
|
Florent Kermarrec
|
04f7fbd7e2
|
simplify litescope export with do_exit call and remove automatic clean
|
2015-02-12 21:15:51 +01:00 |
|
Florent Kermarrec
|
f8003c92aa
|
simplify litescope export with do_exit call and remove automatic clean
|
2015-02-12 21:04:52 +01:00 |
|
Florent Kermarrec
|
4e4800e1b2
|
simplify litescope export with do_exit call
|
2015-02-12 21:00:45 +01:00 |
|
Florent Kermarrec
|
61d12a3431
|
fix transport_rx_description (detected with new Migen check)
|
2015-02-12 20:45:15 +01:00 |
|
Florent Kermarrec
|
bceee36ef6
|
etherbone: reads OK on hardware
|
2015-02-12 15:50:07 +01:00 |
|
Florent Kermarrec
|
23c4f5c090
|
etherbone: writes OK on hardware
|
2015-02-12 13:15:30 +01:00 |
|
Florent Kermarrec
|
bfb50e698f
|
etherbone: add more debug signals
|
2015-02-12 12:33:10 +01:00 |
|
Florent Kermarrec
|
0818c29287
|
etherbone: probing OK on hardware
|
2015-02-12 12:17:17 +01:00 |
|
Florent Kermarrec
|
b6aeea676b
|
etherbone: simplify model usage
|
2015-02-12 12:09:39 +01:00 |
|
Florent Kermarrec
|
a2455b19af
|
etherbone: create example design target
|
2015-02-12 11:37:54 +01:00 |
|
Florent Kermarrec
|
f03212a30d
|
cosmetic: define params before payload
|
2015-02-12 11:10:05 +01:00 |
|
Florent Kermarrec
|
9eb2e313e7
|
etherbone_tb: add autocheck
|
2015-02-12 02:00:26 +01:00 |
|
Florent Kermarrec
|
d5887416f1
|
code cleanup
|
2015-02-12 01:30:17 +01:00 |
|
Florent Kermarrec
|
b8f2fc2290
|
move generic modules to generic/__init__.py
|
2015-02-12 01:19:36 +01:00 |
|
Florent Kermarrec
|
e4958ffab3
|
etherbone: cleanup
|
2015-02-12 01:12:52 +01:00 |
|
Florent Kermarrec
|
ea47037570
|
etherbone_tb OK (will need cleanup)
|
2015-02-12 00:01:03 +01:00 |
|
Florent Kermarrec
|
fca89e8b74
|
etherbone: wishbone reads seems OK in simulation
|
2015-02-11 21:51:25 +01:00 |
|
Florent Kermarrec
|
4a4e82b5f6
|
etherbone: wishbone writes seems OK in simulation
|
2015-02-11 20:54:32 +01:00 |
|
Florent Kermarrec
|
eee07e6eec
|
etherbone: code wishbone master
|
2015-02-11 19:44:02 +01:00 |
|
Florent Kermarrec
|
384fc3c868
|
etherbone: record wip
|
2015-02-11 18:37:59 +01:00 |
|
Florent Kermarrec
|
abe6d87438
|
etherbone: add record depacketizer/packetizer (wip)
|
2015-02-11 16:21:06 +01:00 |
|
Florent Kermarrec
|
247c30ae26
|
etherbone: add etherbone_tb, able to probe etherbone endpoint
|
2015-02-11 14:33:17 +01:00 |