Commit graph

37 commits

Author SHA1 Message Date
Florent Kermarrec
28d04ec300 soc: rename with_sdram option to with_main_ram (with_sdram was confusing) 2015-03-14 00:49:19 +01:00
Florent Kermarrec
95fa753149 liteeth: add phy autodetect function (phy can still be instanciated directly) 2015-03-06 10:10:34 +01:00
Florent Kermarrec
2b9397ff5b targets: do not implement sdram if already provided by SoC (allow use of -Ot with_sdram = True) 2015-03-06 07:56:45 +01:00
Florent Kermarrec
0716dadaf2 targets: keep the SPI flash core even if with_rom is enabled, so that flash booting in the BIOS still works 2015-03-03 10:39:31 +01:00
Florent Kermarrec
02ef1dc95a targets: fix mlabs_video FramebufferSoC 2015-03-02 18:38:43 +01:00
Florent Kermarrec
473997df26 cpuif: add CSR_ prefix to CSR base addresses (avoid conflicts between CSR and mems bases) 2015-03-02 16:52:17 +01:00
Florent Kermarrec
de698c51e4 sdram: rename self.phy_settings to self.settings (using phy.settings instead of phy.phy_settings seems cleaner) 2015-03-02 11:29:43 +01:00
Florent Kermarrec
6107b7844a test implementation on all targets and fix issues 2015-02-28 12:04:51 +01:00
Florent Kermarrec
1366ff5e26 move mxcrg to others (we should integrate it in mlabs_video.py and remove the verilog file in the future) 2015-02-28 11:51:51 +01:00
Florent Kermarrec
69e869893d remane GenSoC to SoC (more coherent and we will add support for multiple SoCs with their own Wisbbone/CSR buses in the future) 2015-02-28 11:36:15 +01:00
Florent Kermarrec
2c51adcd68 misoclib: better organization (create cores categories: cpu, mem, com, ...) 2015-02-28 09:40:44 +01:00
Florent Kermarrec
5e2e9338d2 bios: we can now use -Ot with_rom True on targets to force bios implementation in integrated rom (can speed up debug we don't want to reflash SPI or NOR flash) 2015-02-27 17:22:44 +01:00
Florent Kermarrec
b031c5edae targets: fix MiniSoC 2015-02-27 17:12:37 +01:00
Florent Kermarrec
367db268ad reserve csr_map 0-->16 for gensoc internal csrs 2015-02-27 14:18:13 +01:00
Florent Kermarrec
77a6f580e2 gensoc: add check_cpu_memory_region and check_csr_region to detect csr and mem regions conflicts 2015-02-27 10:23:02 +01:00
Florent Kermarrec
5e8a0c496d gensoc: add mem_map and mem_decoder to avoid duplications 2015-02-26 20:12:27 +01:00
Florent Kermarrec
00862a383c liteeth: fix import (from liteeth --> from misoclib.liteeth) 2015-02-26 09:48:37 +01:00
Florent Kermarrec
0a38b8c74a add LiteX external core and remove ethmac 2015-02-18 10:43:44 -07:00
Florent Kermarrec
9ebb8f8022 remove verilog and move mxcrg.v to misoclib/mxcrg 2015-02-18 10:40:30 -07:00
Florent Kermarrec
ceb675c3f1 fix cf92821 merge issue 2014-12-19 21:49:49 +08:00
Yann Sionneau
cf92821fcf Refactor directory hierarchy of sdram phys and controllers 2014-11-27 22:09:10 +08:00
Sebastien Bourdeauducq
33530e0921 ethmac: style/renaming 2014-11-20 18:01:48 -08:00
Florent Kermarec
603c2641bb new Ethernet MAC 2014-11-20 16:47:22 -08:00
Sebastien Bourdeauducq
213cb43ae5 Keep only basic SoC designs in MiSoC 2014-08-03 12:30:15 +08:00
Sebastien Bourdeauducq
6298624f98 sdramphy: remove fixed parameters 2014-05-14 16:08:40 +02:00
Sebastien Bourdeauducq
94b2295a96 targets/mlabs_video: pass with_memtest as kwargs 2014-05-14 15:02:07 +02:00
Sebastien Bourdeauducq
1c08aeb21c Initial mor1kx (OpenRISC) support
Based on milkymist-ng-mor1kx by Stefan Kristiansson
2014-05-14 10:24:56 +02:00
Florent Kermarrec
1adceb8276 sdramphy: move and clean up s6ddrphy, add generic SDRAM PHY 2014-04-17 19:38:25 +02:00
Sebastien Bourdeauducq
9e784fc82c Generate mem.h from SoC description 2014-02-21 17:55:05 +01:00
Sebastien Bourdeauducq
fce46ac0ca Simplify use of external targets/platforms/cores + add default platform in targets 2014-02-16 14:51:52 +01:00
Sebastien Bourdeauducq
88d4962a1c targets/mlabs_video: use outer video inputs 2014-02-13 22:07:23 +01:00
Sebastien Bourdeauducq
ad974a07ef gensoc: support for user-defined UART and add default values for SRAM and L2 sizes 2014-01-06 22:12:42 +01:00
Sebastien Bourdeauducq
65f3c1ddff targets/mlabs_video: use new Cat syntax 2013-12-05 23:55:14 +01:00
Sebastien Bourdeauducq
352919d17e norflash: add support for writes 2013-11-30 20:37:56 +01:00
Sebastien Bourdeauducq
257185cc9c rename create_sdram_modules and add register_rom 2013-11-24 20:16:19 +01:00
Sebastien Bourdeauducq
fca0b968e7 generate linker memory map, move all generated files into the same folder 2013-11-24 19:50:17 +01:00
Sebastien Bourdeauducq
fdff1ae5f8 make build system more generic 2013-11-24 13:37:32 +01:00
Renamed from top.py (Browse further)