litex

Hardware/litex

Fork 0

mirror of https://github.com/enjoy-digital/litex.git synced 2025-01-04 09:52:26 -05:00

Commit graph

Select branches

Hide pull requests

Dolu1990-patch-1

Dolu1990-patch-2

Dolu1990-patch-3

allows_clk_name_override

ci-cpus

ci-cva6

ci-dev-test

ci-openrisc

ctu-can-fd

dma_nax

efinix_fixes

efinix_fixes2

efinix_iface_signal_names

export_csr_c_rework

framebuffer_change

generic_toolchain

ghdl_fix

gowin_emcu_uart

hyperbus_2x

hyperbus_io_regs

hyperbus_variable_latency

hyperram_decoupling

hyperram_new

kianv

liteeth_wishbone_tx_rx_buses

master

multi-channel-pwm

naxriscv-merge

naxriscv_update

neorv32_litex_wrapper

neorv32_params

urv

usb_ohci_phy_fix

verilog_improvements

verilog_improvements_2

vexriscv_smp_irqs

video_framebuffer_skip_first_frame

video_mod_fix

wishbone_dma_ctrl

wishbone_word_byte_addressing

wuff

zynqmp_aximaster_eth_i2c_uart

#10

#100

#1004

#1007

#1008

#101

#1012

#1013

#1015

#1016

#1017

#1019

#1020

#1021

#1022

#1023

#1024

#1028

#1030

#1032

#1033

#1035

#1037

#1038

#1039

#1040

#1041

#1043

#1044

#1046

#1050

#1051

#1052

#1053

#1054

#1055

#1057

#1058

#106

#1061

#1065

#1066

#1067

#1068

#1069

#1070

#1071

#1072

#1074

#1075

#1076

#1078

#1079

#108

#1080

#1082

#1087

#1088

#1089

#109

#1090

#1091

#1092

#1093

#1094

#1098

#11

#1100

#1102

#1103

#1104

#1111

#1113

#1114

#1115

#1116

#1117

#112

#1121

#1123

#1124

#1125

#1126

#1128

#1129

#113

#1130

#1131

#1132

#1134

#1135

#1136

#1137

#1138

#1139

#114

#1140

#1141

#1143

#1144

#1145

#1148

#1151

#1153

#1155

#1156

#1157

#1159

#116

#1160

#1161

#1162

#1165

#1166

#1167

#1169

#1170

#1171

#1172

#1173

#1176

#1177

#1178

#1179

#118

#1180

#1183

#1184

#1185

#1186

#1187

#1188

#1189

#1190

#1191

#1193

#1195

#1196

#1197

#1199

#12

#120

#1201

#1203

#1207

#1208

#121

#1213

#1214

#1218

#122

#1221

#1222

#1223

#1224

#1225

#1226

#1227

#1228

#1229

#123

#1230

#1232

#1234

#1235

#1236

#124

#1245

#1246

#1248

#1249

#125

#1250

#1251

#1254

#1255

#1256

#1258

#1259

#126

#1262

#1265

#1267

#127

#1273

#1274

#1275

#1276

#1277

#1278

#1279

#128

#1281

#1282

#1283

#1284

#1286

#1287

#1288

#129

#1290

#1292

#1293

#1294

#13

#130

#1300

#1301

#1302

#1303

#1304

#1305

#1307

#1308

#1309

#131

#1310

#1311

#1315

#1316

#1317

#1318

#1321

#1322

#1323

#1324

#1325

#1326

#1328

#1329

#1331

#1333

#1334

#1335

#1336

#1338

#1340

#1346

#1347

#135

#1352

#1355

#1356

#1358

#1359

#1360

#1361

#1362

#1367

#1369

#1374

#1375

#1376

#1378

#1379

#138

#1380

#1381

#1383

#1384

#1385

#1386

#1387

#1388

#1389

#1390

#1391

#1392

#1393

#1395

#14

#1401

#1402

#1403

#1405

#1406

#1409

#141

#1410

#1412

#1413

#1414

#1418

#1423

#1425

#1426

#1430

#1433

#1434

#1435

#1436

#1437

#1438

#144

#1440

#1442

#1444

#1446

#1447

#1448

#1449

#1450

#1453

#1456

#1458

#1460

#1465

#1467

#1470

#1472

#1473

#1474

#1475

#1476

#148

#1480

#1481

#1482

#1484

#1485

#1486

#1487

#1488

#1489

#149

#1490

#1493

#1494

#1495

#1496

#1497

#1499

#15

#150

#1500

#1501

#1503

#1504

#1505

#1506

#1507

#1510

#1512

#1513

#1515

#1517

#1518

#1519

#152

#1520

#1521

#1522

#1524

#1526

#1527

#1528

#1529

#153

#1531

#1535

#1537

#1538

#1539

#154

#1540

#1541

#1543

#1546

#1547

#1548

#1549

#155

#1551

#1553

#1558

#1559

#156

#1560

#1561

#1563

#1564

#1566

#157

#1571

#1572

#1574

#1575

#1579

#158

#1580

#1581

#1586

#1594

#1595

#1597

#1598

#16

#1602

#161

#1613

#1616

#1617

#162

#1625

#1627

#1629

#163

#1631

#1632

#1634

#1636

#1638

#164

#1641

#1643

#1646

#1647

#1648

#165

#1650

#1651

#1653

#1654

#1655

#1656

#1657

#1659

#166

#1662

#167

#1670

#1671

#1673

#1674

#1677

#168

#1683

#1684

#1685

#1689

#169

#1690

#1691

#1692

#1693

#1697

#1699

#17

#170

#1702

#171

#1710

#1713

#1715

#1718

#172

#1720

#1721

#1724

#1728

#1729

#173

#1730

#1733

#1735

#1736

#1737

#1738

#174

#1740

#1741

#1742

#1743

#1744

#1745

#1747

#1748

#1749

#175

#1751

#1752

#1755

#1757

#1758

#1759

#176

#1760

#1762

#1763

#1764

#1767

#1768

#1769

#1775

#1776

#1778

#1779

#178

#1780

#1781

#1782

#1786

#1787

#1789

#179

#1790

#1791

#1795

#1797

#1799

#18

#1800

#1804

#1806

#1808

#1809

#1810

#1812

#1815

#1816

#1817

#1818

#1819

#182

#1821

#1822

#1823

#1824

#1825

#1827

#1828

#1829

#183

#1833

#1838

#184

#1840

#1843

#1845

#185

#1850

#1851

#1852

#1855

#1856

#186

#1862

#1865

#187

#1871

#1872

#1874

#1876

#1877

#1878

#188

#1881

#1884

#1885

#1886

#1887

#1888

#189

#1890

#1894

#1895

#1897

#1898

#1899

#19

#190

#1900

#1901

#1902

#1904

#1906

#1908

#1909

#191

#1911

#1912

#1913

#1915

#1916

#1918

#1919

#192

#1921

#1923

#1925

#1926

#1928

#1929

#193

#1932

#1936

#1937

#1938

#1939

#194

#1940

#1941

#1942

#1943

#1944

#1945

#1946

#1948

#1949

#195

#1951

#1952

#1953

#1954

#1955

#1956

#1958

#1959

#196

#1961

#1962

#1964

#1966

#1968

#1969

#197

#1971

#1972

#1973

#1974

#1975

#1978

#198

#1983

#1984

#1985

#1989

#199

#1990

#1991

#1992

#1993

#1994

#1995

#1996

#1997

#1998

#1999

#20

#200

#2001

#2003

#2004

#2005

#2006

#2007

#2009

#201

#2011

#2012

#2016

#2017

#2018

#2019

#202

#2021

#2022

#2024

#2026

#2028

#203

#2030

#2033

#2035

#2036

#204

#2042

#2043

#2044

#2045

#2046

#2047

#2048

#2050

#2053

#2055

#2056

#2057

#2058

#2059

#206

#2060

#2063

#2065

#2066

#2068

#2069

#2070

#2073

#2074

#2075

#2076

#2077

#2078

#2079

#2081

#2082

#2083

#2086

#2087

#2089

#2090

#2093

#2095

#2097

#2098

#2099

#21

#210

#2100

#2101

#2102

#2104

#2105

#2106

#2111

#2113

#2115

#2116

#2117

#2118

#2119

#2120

#2122

#2123

#2125

#2127

#2128

#2129

#2130

#2131

#2133

#2135

#2137

#2139

#214

#2140

#2142

#2143

#2144

#2145

#2146

#2147

#2148

#2150

#2151

#2153

#216

#217

#218

#219

#22

#221

#222

#223

#235

#24

#240

#241

#243

#244

#246

#247

#25

#251

#252

#253

#254

#255

#257

#259

#26

#260

#261

#262

#263

#264

#266

#269

#27

#270

#271

#272

#274

#275

#276

#277

#278

#28

#280

#282

#283

#284

#285

#286

#29

#293

#297

#30

#300

#302

#304

#305

#306

#307

#308

#309

#31

#310

#311

#312

#313

#315

#319

#32

#320

#321

#324

#326

#327

#328

#330

#331

#332

#336

#337

#338

#339

#34

#340

#349

#35

#351

#354

#357

#358

#359

#36

#360

#363

#366

#369

#37

#370

#373

#374

#375

#376

#378

#38

#380

#381

#382

#383

#386

#387

#389

#39

#390

#393

#395

#396

#397

#399

#40

#400

#401

#402

#403

#405

#408

#41

#410

#411

#412

#416

#418

#419

#42

#421

#422

#423

#424

#425

#426

#427

#429

#43

#430

#431

#432

#433

#434

#435

#436

#437

#439

#44

#440

#441

#442

#444

#445

#446

#447

#448

#45

#450

#451

#452

#458

#459

#462

#464

#467

#469

#47

#470

#472

#473

#474

#475

#476

#477

#478

#48

#481

#482

#483

#484

#485

#487

#488

#49

#490

#491

#492

#494

#496

#499

#50

#500

#502

#503

#504

#505

#506

#507

#508

#509

#51

#510

#511

#513

#514

#516

#517

#518

#519

#52

#521

#523

#524

#526

#527

#53

#530

#531

#533

#534

#535

#536

#537

#538

#539

#541

#542

#543

#545

#547

#549

#55

#550

#551

#552

#553

#555

#556

#557

#558

#559

#56

#562

#563

#564

#565

#567

#568

#569

#57

#570

#573

#574

#575

#576

#578

#579

#58

#580

#581

#582

#583

#584

#585

#587

#588

#59

#592

#593

#594

#595

#597

#598

#599

#60

#600

#602

#603

#604

#605

#606

#607

#61

#610

#611

#615

#617

#619

#620

#621

#622

#623

#624

#625

#626

#627

#63

#631

#632

#634

#635

#636

#637

#639

#64

#640

#642

#643

#644

#647

#649

#65

#650

#651

#652

#653

#654

#655

#656

#657

#659

#66

#661

#662

#663

#664

#665

#666

#668

#67

#671

#672

#673

#674

#675

#677

#678

#679

#68

#680

#681

#684

#688

#689

#69

#690

#691

#692

#696

#699

#70

#700

#701

#702

#703

#704

#705

#706

#707

#708

#709

#71

#711

#713

#714

#716

#718

#719

#72

#721

#722

#724

#725

#727

#729

#731

#732

#734

#735

#736

#737

#738

#742

#745

#747

#749

#75

#750

#754

#76

#761

#762

#768

#77

#772

#774

#775

#776

#777

#778

#78

#780

#781

#782

#784

#787

#788

#789

#79

#790

#791

#792

#793

#794

#795

#796

#797

#799

#80

#800

#801

#803

#805

#806

#807

#808

#809

#81

#810

#811

#813

#815

#816

#818

#819

#820

#821

#822

#823

#824

#830

#832

#833

#836

#838

#840

#841

#843

#845

#846

#847

#849

#850

#852

#853

#854

#857

#858

#859

#86

#860

#863

#864

#865

#866

#867

#868

#871

#872

#873

#874

#875

#877

#879

#88

#880

#881

#884

#885

#886

#887

#891

#892

#895

#896

#897

#899

#900

#901

#902

#904

#905

#906

#908

#91

#910

#911

#915

#916

#917

#918

#92

#920

#923

#924

#926

#927

#93

#930

#931

#932

#936

#94

#940

#941

#942

#943

#945

#947

#948

#949

#95

#952

#953

#956

#957

#958

#96

#961

#962

#964

#965

#967

#969

#970

#975

#976

#977

#978

#979

#98

#980

#986

#987

#988

#99

#992

#993

#994

#995

#998

2020.04

2020.08

2020.12

2021.04

2021.08

2021.12

2022.04

2022.08

2022.12

2023.04

2023.08

2023.12

2024.04

2024.08

bbaadebf68 gitignore: update Sebastien Bourdeauducq 2012-03-08 18:14:19 +0100
ab800fa2ed bus: generic transaction model Sebastien Bourdeauducq 2012-03-08 18:14:06 +0100
ddc0e49981 vpi: patch for Icarus Verilog Sebastien Bourdeauducq 2012-03-08 17:27:59 +0100
59a57e7a76 examples: small cleanup Sebastien Bourdeauducq 2012-03-08 15:55:02 +0100
678a89d572 sim: fix zero encoding Sebastien Bourdeauducq 2012-03-08 15:34:08 +0100
decbd069fa sim: fix message debug formatting Sebastien Bourdeauducq 2012-03-08 15:27:35 +0100
98e96b3952 sim: make initialization cycle optional (selectable by function attribute) Sebastien Bourdeauducq 2012-03-06 19:43:59 +0100
8160ced2e9 sim: memory access Sebastien Bourdeauducq 2012-03-06 19:29:39 +0100
db8f8bf2e3 fhdl: register memory objects with namespace Sebastien Bourdeauducq 2012-03-06 18:33:44 +0100
6f829c7afc sim: support for signed numbers Sebastien Bourdeauducq 2012-03-06 16:46:18 +0100
90184b22d2 fhdl/verilog: fix signed constant conversion Sebastien Bourdeauducq 2012-03-06 16:45:44 +0100
0a23cadd38 vpi: install target Sebastien Bourdeauducq 2012-03-06 15:51:09 +0100
9da512dbf5 sim: VCD generation Sebastien Bourdeauducq 2012-03-06 15:26:04 +0100
22b3c11b93 sim: clean startup/shutdown Sebastien Bourdeauducq 2012-03-06 15:00:02 +0100
06de17b16c sim: remove temporary files and socket Sebastien Bourdeauducq 2012-03-06 14:20:26 +0100
7230508e7c fhdl/namer: do not reference objects with __del__ methods to avoid uncollectable cycles Sebastien Bourdeauducq 2012-03-06 14:18:22 +0100
2c375e900f sim: remove default sockaddr Sebastien Bourdeauducq 2012-03-06 13:58:49 +0100
8d16fde48c fhdl: add simulation functions in fragment Sebastien Bourdeauducq 2012-03-06 13:58:22 +0100
aac9752558 sim: basic functionality working Sebastien Bourdeauducq 2012-03-05 20:31:41 +0100
c4c22c9ca0 sim: signal writes working Sebastien Bourdeauducq 2012-03-05 15:40:21 +0100
9bbec278c6 sim: cleanups Sebastien Bourdeauducq 2012-03-04 22:56:56 +0100
2cd71e4b5e sim: signal reads working Sebastien Bourdeauducq 2012-03-04 22:33:03 +0100
c0b0161ec9 sim: compile VPI module Sebastien Bourdeauducq 2012-03-04 21:27:02 +0100
29859acc34 sim: two way IPC working Sebastien Bourdeauducq 2012-03-04 19:17:03 +0100
8586daf2dd sim: IPC module (lacks str/int encoding) Sebastien Bourdeauducq 2012-03-03 18:55:38 +0100
7f307c54a9 README: clarify license Sebastien Bourdeauducq 2012-02-29 20:30:08 +0100
8d4a42887e ddrphy: working on hardware, simulation a bit messed up Sebastien Bourdeauducq 2012-02-24 15:44:51 +0100
baba267db6 ddrphy: request wrdata_en/rddata_en at the same time as the command Sebastien Bourdeauducq 2012-02-24 15:14:58 +0100
17b2588321 ddrphy: reads OK, write data coming out 1/2 cycle too late Sebastien Bourdeauducq 2012-02-24 15:05:52 +0100
a363eb4a36 ddrphy: partly working Sebastien Bourdeauducq 2012-02-24 13:54:10 +0100
3179a27d14 dfii: set data mask Sebastien Bourdeauducq 2012-02-23 22:00:51 +0100
92ac69bae3 dfii: new design Sebastien Bourdeauducq 2012-02-23 21:21:07 +0100
b3ca952a39 s6ddrphy: read path OK in simulation Sebastien Bourdeauducq 2012-02-21 17:38:40 +0100
b4e041ecf1 s6ddrphy: write path OK in simulation Sebastien Bourdeauducq 2012-02-20 23:55:20 +0100
ce51653381 s6ddrphy: generate DQ/DQS/DM OE Sebastien Bourdeauducq 2012-02-20 16:13:56 +0100
cbc3b7fa83 s6ddrphy: DQ/DQS/DM SERDES Sebastien Bourdeauducq 2012-02-20 13:45:57 +0100
4c1e18a9b5 s6ddrphy: clock, address and command Sebastien Bourdeauducq 2012-02-19 20:49:56 +0100
f35cd4a85b Prepare for new DDR PHY Sebastien Bourdeauducq 2012-02-19 18:43:42 +0100
1b8cb5b46c bus/dfi: fix multiphase naming Sebastien Bourdeauducq 2012-02-19 17:57:04 +0100
1e4e092a55 bios: fix function prototypes Sebastien Bourdeauducq 2012-02-18 21:06:35 +0100
d8d4e81b6e bank/csrgen: fix RE generation Sebastien Bourdeauducq 2012-02-18 18:56:18 +0100
026457a98c Send SDRAM initialization sequence and answer PHY read/write requests. Obstinately refuses to work, unfortunately. Sebastien Bourdeauducq 2012-02-18 18:12:14 +0100
55a265d967 bank: add RE signal for registers made of fields Sebastien Bourdeauducq 2012-02-17 23:52:06 +0100
92dfbb92dd bus: add interconnect statements function Sebastien Bourdeauducq 2012-02-17 23:51:32 +0100
f995e8b92e fhdl: check we pass BV to signals Sebastien Bourdeauducq 2012-02-17 23:50:54 +0100
5bc840b9c1 DFI injector (untested) Sebastien Bourdeauducq 2012-02-17 23:50:10 +0100
c38de34a21 bios: DDR initialization skeleton Sebastien Bourdeauducq 2012-02-17 18:47:04 +0100
e5927e265f bios: add flash target using m1nor Sebastien Bourdeauducq 2012-02-17 18:16:29 +0100
48ddbf0c85 Add build Makefile and JTAG load script Sebastien Bourdeauducq 2012-02-17 18:09:48 +0100
c387ce7ce5 Map DDR PHY controls in CSR Sebastien Bourdeauducq 2012-02-17 17:34:59 +0100
a1ad30faab fhdl/verilog: properly connect instance inouts Sebastien Bourdeauducq 2012-02-17 11:08:41 +0100
5d1dad583b Connect DDR PHY Sebastien Bourdeauducq 2012-02-17 11:04:44 +0100
cdd58e023b s6ddrphy: use single-ended DQS Sebastien Bourdeauducq 2012-02-17 10:53:58 +0100
cc5e4ae710 clkfx: remove Sebastien Bourdeauducq 2012-02-16 19:30:00 +0100
204452b0d3 m1crg: make clock feedback pin bidirectional Sebastien Bourdeauducq 2012-02-16 18:35:44 +0100
f36a45edcb lm32: compatibility with the new instance API Sebastien Bourdeauducq 2012-02-16 18:35:22 +0100
ca7056b07f fhdl: support forwarding of bidirectional signals from instance ports Sebastien Bourdeauducq 2012-02-16 18:34:32 +0100
72f9af9d90 Generate all clocks for the DDR PHY Sebastien Bourdeauducq 2012-02-16 18:02:37 +0100
c08687b9c6 bus/dfi: filter signals by direction Sebastien Bourdeauducq 2012-02-15 21:48:05 +0100
ef7aea0f31 bank: omit device write register when access_bus==READ_ONLY and access_dev==WRITE_ONLY Sebastien Bourdeauducq 2012-02-15 18:23:31 +0100
fa9cf3e466 bus: add DFI Sebastien Bourdeauducq 2012-02-15 18:09:14 +0100
859c9d8849 Use new bus API Sebastien Bourdeauducq 2012-02-15 16:55:13 +0100
91e279ee04 bank/csrgen: use new bus API Sebastien Bourdeauducq 2012-02-15 16:42:17 +0100
af5230c8ee bus: fix simple interconnect Sebastien Bourdeauducq 2012-02-15 16:42:05 +0100
0493212124 bus: simplify and cleanup Sebastien Bourdeauducq 2012-02-15 16:30:16 +0100
1368b666df s6ddrphy: prepare quilt Sebastien Bourdeauducq 2012-02-14 15:52:39 +0100
b157d84434 README Sebastien Bourdeauducq 2012-02-14 15:43:09 +0100
46b1f74e98 bus/asmibus/hub: forward data and tag_call Sebastien Bourdeauducq 2012-02-14 14:00:17 +0100
aef2e4b5e8 Use double quotes for all strings Sebastien Bourdeauducq 2012-02-14 13:15:00 +0100
0c214b484e Use double quotes for all strings Sebastien Bourdeauducq 2012-02-14 13:12:43 +0100
5165ff7ec3 Include Wishbone to ASMI bridge Sebastien Bourdeauducq 2012-02-13 23:12:57 +0100
e11d9b9322 bus/wishbone2asmi: cache hits working Sebastien Bourdeauducq 2012-02-13 23:11:16 +0100
1662e1b3bc corelogic: support reverse in displacer/chooser Sebastien Bourdeauducq 2012-02-13 23:10:27 +0100
264be80f2d Fix syntax errors and other stupid problems Sebastien Bourdeauducq 2012-02-13 22:28:02 +0100
8a61d9d121 bus/csr: Rename a->adr d->dat to be consistent with the other buses Sebastien Bourdeauducq 2012-02-13 21:46:39 +0100
d6da88d11d doc: update ASMI description Sebastien Bourdeauducq 2012-02-13 17:23:32 +0100
060426cb59 bus/wishbone2asmi: set WM, and send 0 when inactive Sebastien Bourdeauducq 2012-02-13 16:49:43 +0100
cad9d3b960 bus: Wishbone to ASMI caching bridge (untested) Sebastien Bourdeauducq 2012-02-13 16:29:38 +0100
244bf17db7 corelogic/misc: displacer + chooser Sebastien Bourdeauducq 2012-02-11 20:57:08 +0100
e10e4360f3 corelogic/misc/multimux: less confusing variable name Sebastien Bourdeauducq 2012-02-11 20:56:51 +0100
7894411418 bus/asmibus: fix typo Sebastien Bourdeauducq 2012-02-11 20:56:01 +0100
28b0c340af corelogic/record: add to_signal convenience function Sebastien Bourdeauducq 2012-02-11 20:55:23 +0100
e62ac1d3a1 corelogic/misc: contiguous split Sebastien Bourdeauducq 2012-02-11 11:52:15 +0100
ef436a1ec9 bus/asmibus: add get_slots, fix get_fragment Sebastien Bourdeauducq 2012-02-10 17:49:06 +0100
945d655d45 bus: ASMI hub (untested) Sebastien Bourdeauducq 2012-02-10 15:21:04 +0100
c1bff38861 doc: update Bank description Sebastien Bourdeauducq 2012-02-08 19:26:56 +0100
0654bf4583 tools: use install and /usr/local (as suggested by David Kuehling) Sebastien Bourdeauducq 2012-02-08 15:09:07 +0100
bfd2bf4ed3 tools: remove bin2hex Sebastien Bourdeauducq 2012-02-08 15:08:03 +0100
755079d7fa libbase: blocking UART write if IRQs are enabled Sebastien Bourdeauducq 2012-02-07 15:12:27 +0100
73fce59631 software: shell from original BIOS Sebastien Bourdeauducq 2012-02-07 15:02:44 +0100
ef0667d959 software: UART RX demo Sebastien Bourdeauducq 2012-02-07 14:12:33 +0100
506ffab11a uart: RX support Sebastien Bourdeauducq 2012-02-07 14:12:23 +0100
fb22edc06a software: enable -Wmissing-prototypes Sebastien Bourdeauducq 2012-02-07 13:02:06 +0100
63f6dece56 software: use the Clang/LLVM compiler Sebastien Bourdeauducq 2012-02-07 12:52:34 +0100
a40b0ea175 software: fix size_t and ptrdiff_t Sebastien Bourdeauducq 2012-02-07 12:06:49 +0100
494c383fa8 software: remove unnecessary IRQ acks Sebastien Bourdeauducq 2012-02-07 00:07:25 +0100
b6b1901bb8 LM32: make IP read-only and interrupt lines level-sensitive Sebastien Bourdeauducq 2012-02-07 00:07:12 +0100
4aaf48afb0 software: interrupt driven UART working Sebastien Bourdeauducq 2012-02-06 23:53:29 +0100
58f4f78d2c sram: fix sub-word write Sebastien Bourdeauducq 2012-02-06 23:13:35 +0100
47883675db bus/wishbone2csr: truncate WB data Sebastien Bourdeauducq 2012-02-06 18:43:34 +0100