Commit Graph

568 Commits

Author SHA1 Message Date
Dolu1990 d73aa9ce00 rework csr exception/interrupt handeling wip 2018-06-24 00:14:55 +02:00
Dolu1990 dd47db9ad0 wip 2018-06-20 12:35:12 +02:00
Dolu1990 8886f7e6d4 test wip 2018-06-19 16:15:42 +02:00
Dolu1990 6c673b0749
Merge pull request #27 from tomverbeure/typos
README language
2018-06-19 11:18:28 +02:00
Tom Verbeure 43ab18fb83 Unrool -> Unroll 2018-06-19 02:02:43 -07:00
Tom Verbeure 68cc141401 Language 2018-06-19 01:53:31 -07:00
Tom Verbeure dda9fe76e2 an -> a 2018-06-19 01:41:24 -07:00
Tom Verbeure 8d22f74c83 Language 2018-06-19 01:39:37 -07:00
Tom Verbeure 4e9e8b3e55 Language 2018-06-18 17:19:37 -07:00
Tom Verbeure 5c9c43aa00 Language 2018-06-18 17:09:29 -07:00
Dolu1990 1090111a6f TestIndividual is now fully random 2018-06-15 13:00:59 +02:00
Dolu1990 b2cd8c5314 Fix exception pipelining 2018-06-15 13:00:26 +02:00
Dolu1990 83864710a3 Fix IBusCached single cycle interaction with mmu bus
Add random test configs
2018-06-09 08:40:19 +02:00
Dolu1990 d10bcbfbbb
Update README.md 2018-06-08 19:06:30 +02:00
Dolu1990 505a92916a
Update README.md 2018-06-08 18:00:22 +02:00
Dolu1990 4e73d4ff7d
Update README.md 2018-06-08 12:43:33 +02:00
Dolu1990 d9a049aa72
Update README.md 2018-06-08 12:31:55 +02:00
Dolu1990 08a1212fca Add DBus simple/cached regressions 2018-06-07 02:31:18 +02:00
Dolu1990 6bc5431fcd Add iBusCached regressions 2018-06-07 00:57:26 +02:00
Dolu1990 5e7dd02bf7 Fix relaxedPc/DYNAMIC_TARGET interaction 2018-06-06 18:30:30 +02:00
Dolu1990 dc968020c4 Fix relaxedBusCmdValid pendingCmd overflow 2018-06-06 15:20:37 +02:00
Dolu1990 7768f065e4 Add many cpu configs on regressions tests (some config are broken) 2018-06-06 02:23:07 +02:00
Dolu1990 8729530a8d Fix Dynamicfetch/!rvc config 2018-06-05 02:33:18 +02:00
Dolu1990 930563291c Allow RVC/dynamic_target/fetch bus latency > 1 all together
Fix freeretos rvc regressions
2018-06-05 02:21:05 +02:00
Dolu1990 702db29edd Fix dynamic prediction RVC allignement 2018-06-04 20:03:08 +02:00
Dolu1990 fc835f370e Fix DynamicPrediction with RVC missprediction between ret instruction and first instruction of the next function 2018-06-04 19:45:15 +02:00
Dolu1990 cee3ad8147
Merge pull request #24 from tomverbeure/typos
Fix some missing Barriel -> barriel fixes
2018-06-04 11:09:05 +02:00
Tom Verbeure 52f1cdbca7 Fix some missing Barriel -> barriel fixes 2018-06-03 21:46:40 -07:00
Dolu1990 9f0387350b Add Freertos RVC binaries regression 2018-06-03 17:10:58 +02:00
Dolu1990 2f57b46edf
Merge pull request #23 from tomverbeure/typos
BarrielShifter -> BarrelShifter
2018-06-03 12:29:56 +02:00
Tom Verbeure e9bbbb3965 BarrielShifter -> BarrelShifter 2018-06-03 07:40:11 +00:00
Dolu1990 7375855e58 DYNAMIC_PREDICTION used with RVC pass tests (1 cycle fetch) 2018-06-03 00:50:18 +02:00
Dolu1990 98b68093f4 dynamic_prediction + RVC => instruction fetch stopped midair 2018-05-28 21:28:39 +02:00
Dolu1990 d65a7703ec Fix travis ? 2018-05-28 20:53:52 +02:00
Dolu1990 4a433e16f1
Merge pull request #21 from tomverbeure/typos
Typos...
2018-05-28 20:24:52 +02:00
Dolu1990 863ac3f34d dynamic prediction now use history from first aligned word of the instruction instead of the last one. 2018-05-28 11:03:13 +02:00
Dolu1990 8a0c238bf3 dynamic prediction ok with rvc, todo dynamic_target with rvc 2018-05-28 10:59:22 +02:00
Tom Verbeure 0335543309 More Unrolls 2018-05-28 07:20:26 +00:00
Tom Verbeure 1613191779 Unrool -> Unroll 2018-05-28 07:18:13 +00:00
Dolu1990 7493e70265 Merge remote-tracking branch 'origin/master' into reworkFetcher 2018-05-28 09:02:30 +02:00
Dolu1990 5943ee727e Fill travis, DhrystoneBench is now a Unit test 2018-05-28 09:02:01 +02:00
Dolu1990 1752b5f184 Give name to inter stages registers 2018-05-27 23:39:49 +02:00
Dolu1990 5704f22739 wip 2018-05-27 23:33:57 +02:00
Dolu1990 346338f084 Better HexTools 2018-05-26 11:51:42 +02:00
Dolu1990 6142b04603 Move HexTools into Spinal 2018-05-26 11:43:16 +02:00
Dolu1990 c8677cca9b Better HexTools 2018-05-26 11:32:36 +02:00
Dolu1990 b0777bc646 Merge remote-tracking branch 'origin/master' into reworkFetcher 2018-05-24 14:05:35 +02:00
Dolu1990 6004dcc365 Fix typo 2018-05-24 14:04:50 +02:00
Dolu1990 9815763b7f Merge remote-tracking branch 'origin/master' into reworkFetcher
Conflicts:
	src/main/scala/vexriscv/plugin/PcManagerSimplePlugin.scala
	src/test/cpp/regression/main.cpp
2018-05-24 14:04:01 +02:00
Dolu1990 c4f33b30e2 Update SynthesisBench murax 2018-05-24 14:03:28 +02:00