Hardware/litex-boards
1
0
Fork 0
mirror of https://github.com/litex-hub/litex-boards.git synced 2025-01-03 03:43:36 -05:00
Code Issues Projects Releases Packages Wiki Activity
1504 commits 9 branches 14 tags 12 MiB
Commit graph

874 commits

Author SHA1 Message Date
Gabriel Somlo
9f9afeaafa targets/nexys-video: Add support for sata pll refclk 2022-03-11 14:40:21 -05:00
enjoy-digital
3b74673a93
Merge pull request #363 from curliph/master 
add Gowin programmer support
 2022-03-08 17:26:50 +01:00
Florent Kermarrec
f52a915487 lambdaconcept_ecpix5: Add initial Video support at 640x480 (with Terminal/Framebuffer). 
I2C intialization code adapted from https://github.com/ultraembedded/ecpix-5.

Tested with:
- python3 -m litex_boards.targets.lambdaconcept_ecpix5 --cpu-type=firev --with-video-terminal --build --load
- python3 -m litex_boards.targets.lambdaconcept_ecpix5 --cpu-type=firev --with-video-framebuffer --build --load

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2022 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on Mar  8 2022 15:34:22
 BIOS CRC passed (c7fe9ecd)

 Migen git sha1: ac70301
 LiteX git sha1: 7ebc7625

--=============== SoC ==================--
CPU:		FireV-STANDARD @ 75MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128KiB
SRAM:		8KiB
L2:		8KiB
SDRAM:		524288KiB 16-bit @ 300MT/s (CL-6 CWL-5)

--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Read leveling:
  m0, b00: |01110000| delays: 02+-01
  m0, b01: |00000000| delays: -
  m0, b02: |00000000| delays: -
  m0, b03: |00000000| delays: -
  best: m0, b00 delays: 02+-01
  m1, b00: |01110000| delays: 02+-01
  m1, b01: |00000000| delays: -
  m1, b02: |00000000| delays: -
  m1, b03: |00000000| delays: -
  best: m1, b00 delays: 02+-01
Switching SDRAM to hardware control.
Memtest at 0x40000000 (2.0MiB)...
  Write: 0x40000000-0x40200000 2.0MiB
   Read: 0x40000000-0x40200000 2.0MiB
Memtest OK
Memspeed at 0x40000000 (Sequential, 2.0MiB)...
  Write speed: 13.6MiB/s
   Read speed: 23.4MiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex> ident
Ident: LiteX SoC on ECPIX-5 2022-03-08 15:34:19
 2022-03-08 15:40:52 +01:00
Florent Kermarrec
39e4e211bb targets/decklink_mini_4k: Add build/use instructions. 2022-03-08 14:14:18 +01:00
curliph
2df7fd573c
Update sipeed_tang_nano_9k.py 
Add Gowin programmer support
 2022-03-08 14:04:28 +08:00
curliph
4c9bc53a3c add Win/powershell and WSL support 2022-03-08 13:24:56 +08:00
Sylvain Munaut
ec28ca8fa3 adi_adrv2crr: Add support for the ADI ADRV2CRR with ADRV9009-ZU11EG SoM 
This is a carrier board with a SoM mounted on it.
There is also an FMC connector that can accept another
AD-FMCOMMS8-EBZ to get two more ADRV9009 RFIC but support for
that is not added yet.

Note that the PCIe support requires :
 - Change the .xci in the litepcie to use the right Quad
 - Revert litex 3c34039b731b42e27e2ee6c8e399e5eb8f3a058f so the
   timing constrainst of litepcie apply correctly

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2022-03-03 22:17:09 +01:00
Florent Kermarrec
0f2e13fdf7 sqrl_fk33: Add HBM2 support (from https://github.com/enjoy-digital/fk33_hbm2_test). 2022-03-03 17:34:48 +01:00
Florent Kermarrec
99a66274c8 xilinx_alveo_u280: Switch HBM2 to USPHBM2 now integrated in LiteX. 2022-03-03 16:11:48 +01:00
Florent Kermarrec
b80c7a7843 targets/sqrl_acorn: write_latency_calibration now disabled by default, no longer required. 2022-03-03 15:50:53 +01:00
Alessandro Comodi
db2d83ea29 antmicro_datacenter: use 100 MHz and add i2c master 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2022-03-01 13:00:36 +01:00
Piotr Binkowski
0b80890119 antmicro_datacenter: add 1 cycle of latency for RCD IC 2022-03-01 12:43:08 +01:00
Piotr Binkowski
9976b47f72 antmicro_datacenter: generate outputs for rowhammer-tester 2022-03-01 12:43:08 +01:00
Karol Gugala
5359fc5bfc antmicro_datacenter: use A7DDRPHY 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2022-03-01 12:43:08 +01:00
Florent Kermarrec
2c4d31066f digilent_arty_z7: Defaults to no_uart. 2022-03-01 11:15:30 +01:00
Florent Kermarrec
673676e3cb digilent_arty_a7: Switch to VivadoProgrammer. 2022-03-01 10:48:22 +01:00
enjoy-digital
1320f3bd23
Merge pull request #357 from DaveBerkeley/colorlight_i9 
Add ColorLight i9 v7.2
 2022-03-01 10:07:55 +01:00
Florent Kermarrec
a19c03fa55 targets: Switch to generic/portable HyperRAM core from LiteX. 2022-03-01 09:10:19 +01:00
Dave Berkeley
c9d009c735 Add ColorLight i9 v7.2 2022-02-28 14:08:49 +00:00
Florent Kermarrec
1623ba5942 targets/stlv7325: Reduce sys_clk_freq to 100MHz. 
See https://github.com/enjoy-digital/litedram/issues/285.
 2022-02-25 09:04:07 +01:00
Florent Kermarrec
872113e1cc stlv7325: Add SDCard support. 2022-02-24 18:02:43 +01:00
Florent Kermarrec
a08f346d90 stlv7325: Add Etherbone support (untested). 2022-02-24 17:43:53 +01:00
Florent Kermarrec
b1550f006a stlv3225: Minor Review/Cleanup, switch to JTAG HS2 programmer. 2022-02-24 17:17:08 +01:00
Andrew Gillham
174d958ca7 Initial support for STLV7325 Kintex-7 board. 2022-02-23 18:28:55 +01:00
enjoy-digital
6661947d96
Merge pull request #354 from madscientist159/master 
Add initial support for RCS Arctic Tern boards
 2022-02-23 18:06:08 +01:00
Florent Kermarrec
1717af68ac targets/sqrl_acorn/ddr3: Disable write_latency_calibration. 
Introduce some memtest failures on some boards.
 2022-02-23 10:38:43 +01:00
Raptor Engineering Development Team
ae4b3c0938 Add initial support for RCS Arctic Tern boards 2022-02-21 20:04:51 -06:00
Ilia Sergachev
85397818d9 add Xilinx ZCU216 support 2022-02-21 19:14:13 +01:00
Florent Kermarrec
7d84e6e863 efinix_titanium_ti60_t225: Add SPI/Native SDCard support. 
Both modes working with 8559b88ad8.
 2022-02-21 10:35:06 +01:00
Florent Kermarrec
df36cdbcc9 siglent_sds1104xe: Switch back to native DRAM width (now possible with Nax). 2022-02-18 11:47:08 +01:00
Florent Kermarrec
d85f88f42a siglent_sds1104xe: Reduce DRAM's width to 16-bit for now (to use NaxRiscv). 2022-02-16 17:59:40 +01:00
Florent Kermarrec
08a79fa3ac lattice_ecp5_vip: Minor cleanups, fix CI. 2022-02-15 10:58:38 +01:00
enjoy-digital
30afe26669
Merge pull request #348 from hubmartin/ecp5-vip 
Draft: Add Lattice ECP5 VIP board + HDMI output board support
 2022-02-15 08:53:57 +01:00
enjoy-digital
896884dd21
Merge branch 'master' into axu2cga_software 2022-02-15 08:21:29 +01:00
Florent Kermarrec
3f58df9974 platforms/targets: Fix typos. 2022-02-14 17:26:46 +01:00
Gwenhael Goavec-Merou
5eca41ac73 targets/alinx_axu2cga: adding PS software support (inspired by xilinx_kv260) 2022-02-12 18:24:01 +01:00
Gwenhael Goavec-Merou
d672d9a9b1 targets: s/alinx_axu2gca/alinx_axu2cga/gc 2022-02-12 18:12:45 +01:00
hubmartin
c2cd4410df
Code cleanup, add copyright 
Signed-off-by: hubmartin <hub.martin@gmail.com>
 2022-02-12 17:50:07 +01:00
Florent Kermarrec
c0e671919d sqrl_acorn: Downgrade to SATA Gen1 for now (allow lower sys_clk_freq and enough for current tests). 2022-02-09 19:10:12 +01:00
Florent Kermarrec
d9b77c6f25 digilent_arty: Add --flash support. 2022-02-09 17:51:56 +01:00
Florent Kermarrec
4894926c40 xilinx_kv260: +x. 2022-02-09 16:01:51 +01:00
hubmartin
27b03df886
Add Lattice ECP5 VIP board + HDMI output board support 2022-02-08 21:47:58 +01:00
Sergiu Mosanu
450a26f395 Merge branch 'master' of https://github.com/litex-hub/litex-boards 2022-02-08 12:55:09 -05:00
Sergiu Mosanu
7ed633dc4b add guideline for serial interface 2022-02-08 12:54:34 -05:00
Sergiu Mosanu
5a0f69502b enable use of HBM for linux boot 2022-02-08 12:18:38 -05:00
Florent Kermarrec
18e8bec9d4 xilinx/kv260: Minor cleanup and add Build/Use instructions (from PR). 2022-02-07 08:12:43 +01:00
enjoy-digital
8621700916
Merge pull request #345 from sergachev/feature/xilinx_kv260 
Add Xilinx KV260 support
 2022-02-07 07:53:55 +01:00
Ilia Sergachev
1d8c3789af add Xilinx KV260 support 2022-02-06 14:38:57 +01:00
Ben Stobbs
617fa26acd
Add 85F to help for orangecrab device 
The 85F orangecrab board exists, and works fine when this option is set to 85F, but leaving it out of the help is a bit confusing.
 2022-02-06 10:36:58 +00:00
Florent Kermarrec
346623fd06 trellisboard: Rename Video I2C to videoi2c. 2022-02-04 09:26:31 +01:00
Florent Kermarrec
6d4fe82179 trellisboard: Rename hdmi_i2c to i2c (to have access to i2c_scan in the BIOS). 2022-02-02 11:08:21 +01:00
Florent Kermarrec
0522d8b0c5 trellisboard: Update i2c.add_init call. 2022-02-02 10:59:54 +01:00
Florent Kermarrec
7f4d464f1b trellisboard: Add Video Terminal/Framebuffer support and use new I2C init feature to automatically configure TP410 at startup. 2022-02-02 09:52:12 +01:00
Florent Kermarrec
4251cfa865 terasic_de0nano: Add Build/Use instructions with JTAG-UART. 2022-02-01 15:58:34 +01:00
Florent Kermarrec
4d45611935 targets: Replace JTAG Atlantic (Deprecated) with JTAG-UART. 2022-02-01 11:30:26 +01:00
enjoy-digital
9144cb44fb
Merge branch 'master' into jev/deca-eth 2022-01-31 16:22:58 +01:00
Jevin Sweval
fbd424fc48 DECA: Add Ethernet and Etherbone support 
Also fixed pcf_en IO standard compared to golden Arrow project.
 2022-01-29 15:15:53 -08:00
Jevin Sweval
9e5224ca49 Add JTAGbone support to Terasic DECA 
Along the way I added UARTbone support to DECA as well for debugging.

Examples:

./terasic_deca.py --csr-csv csr.csv --with-jtagbone --build --load
litex_server --jtag --jtag-config ../prog/openocd_max10_blaster2.cfg
litex_term crossover

./terasic_deca.py --csr-csv csr.csv --uart-name jtag_uart --build --load
litex_term --jtag-config ../prog/openocd_max10_blaster2.cfg jtag
 2022-01-27 14:13:58 -08:00
Gwenhael Goavec-Merou
dd134a4b7d digilent arty z7: allows toolchain selection (PL only) 2022-01-26 07:30:06 +01:00
Florent Kermarrec
74395ca80b digilent_nexyx_video: Add default toolchain value to CRG (to avoid breaking existing designs). 2022-01-25 16:13:57 +01:00
Florent Kermarrec
624572f2e9 alinx_axu2gca: Review and do minor cosmetic changes. 2022-01-25 14:58:47 +01:00
Gwenhael Goavec-Merou
537f04a13d alinx_axu2gca: new board 
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
 2022-01-25 07:35:42 +01:00
Florent Kermarrec
621d45cd9e digilent_arty: Review and improve CRG to avoid specific yosys+nextpnr code. 
sys4x/sys4x_dqs/idelay clks can be disabled when integrated-main-ram is used.
 2022-01-24 19:16:07 +01:00
enjoy-digital
c2276c1e6d
Merge pull request #338 from suarezvictor/master 
Add tweaks to Arty board to support yosys+nextpnr toolchain
 2022-01-24 19:02:59 +01:00
Florent Kermarrec
1abb03e514 tang_nano_4k: Review/Cleanup: 
- Revert abstractions on clk_name/period: Too much abstraction to avoid duplications makes the code more difficult to read.
ex:
  - When constraining clk27, frequency is already in the name.
  - In the target, we want to know we are using clk27 as the main clk.
  - We need a default sys_clk_freq for project only importing BaseSoC.
- Revert SPI Flash import (for consistency with other targets).
- Keep VexRiscv as default CPU since this target is able to run it and also for consistency with other targets.
 2022-01-24 18:46:51 +01:00
enjoy-digital
e357eb6d8f
Merge pull request #337 from sergachev/tang_nano_4k_emcu 
Enable LiteX BIOS on ARM core on Tang nano 4K
 2022-01-24 18:36:10 +01:00
Florent Kermarrec
cc1b46f106 tang_nano_9k: Fix HyperRAM integration. 2022-01-24 18:35:12 +01:00
Victor Suarez Rovere
db77ea5c7a Add tweaks to Arty board to support yosys+nextpnr toolchain 2022-01-24 02:06:34 -03:00
Ilia Sergachev
6238052b10 tang nano 4k: disable spi flash with gowin emcu, cleanup 2022-01-23 16:10:46 +01:00
Ilia Sergachev
6c81fc708c tang nano 4k: add memory regions, set default cpu 2022-01-23 13:05:51 +01:00
enjoy-digital
787f44e7d9
Merge pull request #336 from tcal-x/cmod-a7-flash 
Digilent CMOD A7: add flash support.
 2022-01-23 08:36:49 +01:00
Tim Callahan
6567af6f49 Digilent CMOD A7: add flash support. 
Add both "--flash" and "--with-spi-flash"; tested on board.
4MB flash mapped at 0x00400000.

Signed-off-by: Tim Callahan <tcal@google.com>
 2022-01-22 18:50:12 -08:00
Icenowy Zheng
f533e7f8ba sipeed_tang_nano_9k: enable copackaged PSRAM 
Also enable SPI SDCard which was pending by the lack of main_ram
previously.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
 2022-01-23 03:37:03 +08:00
enjoy-digital
999dbd572f
Merge pull request #334 from Icenowy/tang9k 
sipeed_tang_nano_9k: new board
 2022-01-22 15:49:08 +01:00
Icenowy Zheng
e699c377a5 sipeed_tang_nano_9k: new board 
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
 2022-01-22 11:45:49 +08:00
vacajk
e9d4d9066a xilinx_zcu106: add DDR4 interface and fix reset error 2022-01-22 03:08:21 +08:00
enjoy-digital
b8aad4b030
Merge pull request #332 from tcal-x/prog-cmod-a7 
Add openocd programmer for Digilent CMOD A7.
 2022-01-21 08:05:22 +01:00
Tim Callahan
e0c4c0fe39 Add openocd programmer for Digilent CMOD A7. 
Signed-off-by: Tim Callahan <tcal@google.com>
 2022-01-20 20:54:03 -08:00
Ilia Sergachev
0e91013fc7 quickfeather: fix path to libeos library when board script called not from its directory; fix wget redownloads; add libeos to gitignore 2022-01-20 18:43:59 +01:00
Florent Kermarrec
5f2ccb2d32 targets: Switch from bridge to crossover. 2022-01-19 17:03:17 +01:00
Florent Kermarrec
abb54cebb3 trenz_c10lprefkit: Add Etherbone support. 2022-01-19 14:47:14 +01:00
enjoy-digital
1ce978806d
Merge pull request #328 from sergachev/fix/zedboard_software 
Fix Zedboard software
 2022-01-19 10:05:49 +01:00
Florent Kermarrec
f11106e9c5 targets/digilent_cmod_a7: Simplify/Cleanup. 2022-01-19 10:03:20 +01:00
enjoy-digital
f8e3cc5361
Merge pull request #327 from bl0x/digilent_cmod_a7 
digilent_cmod_a7: Remove unused clocks.
 2022-01-19 09:59:44 +01:00
Ilia Sergachev
bbf13f4439 zedboard: remove a hack 2022-01-19 02:41:11 +01:00
Ilia Sergachev
4f4d47dcdd zedboard: correct memory map 2022-01-19 02:40:54 +01:00
Florent Kermarrec
fccb952c4b target: Remove ident_version=True no longer required. 2022-01-18 17:13:02 +01:00
Florent Kermarrec
7114911cea targets: --no-ident-version is now directly provided by LiteX, remove it on targets implementing it. 2022-01-18 16:47:38 +01:00
Florent Kermarrec
d92a2b82fb targets/l2_cache_reverse: Now defaulting to False in LiteX, so setting it to False for correct Framebuffer operations is no longer required. 2022-01-18 11:37:55 +01:00
Bastian Löher
2c26f07a5a digilent_cmod_a7: Remove unused clocks. 2022-01-17 22:49:10 +01:00
Florent Kermarrec
12fa844b56 decklink_mini_4k: Add dedicated SATA PLL to allow SATA + Framebuffer. 2022-01-17 18:11:52 +01:00
Florent Kermarrec
f97e48e4f3 decklink_mini_4k: Add SATA support (over PCIe2SATA). 2022-01-17 14:19:59 +01:00
Florent Kermarrec
3e187dea42 quicklogic_quickfeather: Make imports similar to other boards. 2022-01-17 10:00:58 +01:00
enjoy-digital
99752738b0
Merge pull request #326 from litex-hub/pr322 
quicklogic_quickfeather: add eos_s3 arm software support library
 2022-01-17 09:56:41 +01:00
Ilia Sergachev
9984bb8ffb quicklogic_quickfeather: add eos_s3 arm software support library 2022-01-17 09:47:38 +01:00
Florent Kermarrec
06fb73ace3 targets/digilent_nexys_video: Remove SATA Gen3 support (max linerate=3.75Gbps with -1 speedgrade). 2022-01-17 08:45:24 +01:00
enjoy-digital
ed04e5f95c
Merge pull request #325 from gsomlo/gls-sata-gen 
targets/digilent_nexys_video: add SATA generation argument
 2022-01-17 08:41:29 +01:00
Florent Kermarrec
6103b3b234 targets/colorlight_5a_75x: List 8.0 in supported revision. 2022-01-17 08:27:19 +01:00
Gabriel Somlo
5c2d85e6a3 targets/digilent_nexys_video: add SATA generation argument 2022-01-16 19:59:36 -05:00
Bastian Löher
1077e23e62 digilent_cmod_a7: Also propagate here. 2022-01-16 11:58:14 +01:00