Charles Papon
|
c16a53c388
|
Refractoring of some arbitration signals
Add UART into Murax
|
2017-07-31 13:34:25 +02:00 |
|
Dolu1990
|
8708d2482f
|
Add more information about dependencies
|
2017-07-30 11:37:22 +02:00 |
|
Charles Papon
|
de33128e01
|
Add Murax 0.55 DMIPS/Mhz
|
2017-07-30 02:42:14 +02:00 |
|
Charles Papon
|
087e3dda89
|
Add Murax scripts
|
2017-07-29 22:43:43 +02:00 |
|
Charles Papon
|
2736681be6
|
Add Murax in the readme
|
2017-07-29 22:25:28 +02:00 |
|
Charles Papon
|
e8aa828744
|
PcPlugin change fastPcCalculation into relaxedPcCalculation
relaxedPcCalculation relax timings on the IBusSimple address => better FMax when the CPU is integrated into a SoC
|
2017-07-29 21:36:30 +02:00 |
|
Charles Papon
|
3b66d986a8
|
Fix cpu sending instruction memory request while being halted by the DebugPlugin
|
2017-07-29 18:20:22 +02:00 |
|
Charles Papon
|
43253f61c1
|
Update Murax info
|
2017-07-29 02:52:57 +02:00 |
|
Charles Papon
|
fa887d3830
|
Add pipelining option (hit 60 Mhz)
|
2017-07-29 02:52:03 +02:00 |
|
Charles Papon
|
3bdf020c67
|
Add interrupts and timer to Murax
8KB ram is the default now
|
2017-07-29 01:59:17 +02:00 |
|
Charles Papon
|
823ac353ff
|
Add Murax SoC (very light, work on ice40)
|
2017-07-28 21:25:49 +02:00 |
|
Dolu1990
|
1450077b70
|
Add Murax SoC (wip)
|
2017-07-28 14:16:30 +02:00 |
|
Charles Papon
|
493f7721cb
|
All FreeRTOS tests are now passing
|
2017-07-28 00:07:51 +02:00 |
|
Charles Papon
|
800e9e79a5
|
freertos regression now include O0 and O3 for rv32i and rv32im
|
2017-07-27 01:23:50 +02:00 |
|
Charles Papon
|
6b3e2dbe7d
|
Add FreeRTOS test regression (FREERTOS=yes)
Multithreaded regression
|
2017-07-26 23:38:59 +02:00 |
|
Charles Papon
|
10d282b2ef
|
Add DBusSimple early injection feature (better DMIPS)
|
2017-07-26 23:36:25 +02:00 |
|
Charles Papon
|
6d117f5c81
|
Fix DataCache bug (interaction between the victim buffer and the memory read request in execute/memory stages)
freeRTOS pass
|
2017-07-23 22:58:26 +02:00 |
|
Charles Papon
|
9fe4e1d54d
|
Package refractoring VexRiscv -> vexriscv Plugin -> plugin
|
2017-07-23 13:28:17 +02:00 |
|
Charles Papon
|
4b5bf7d807
|
Briey Area down by 10% by spliting the memory system in two (System, Debug)
|
2017-07-23 01:11:33 +02:00 |
|
Charles Papon
|
37c338ec98
|
Avalon add read response support.
Fix debug instruction injection and IBusSimplePlugin interraction
|
2017-07-21 20:39:54 +02:00 |
|
Charles Papon
|
54f785b1a3
|
Add full avalon support (pass regression)
|
2017-07-21 17:40:45 +02:00 |
|
Charles Papon
|
52f5020e64
|
Rename some regression commands
Add Avalon regressions (PASS)
DebugModule read response is now 1 cycle latency
|
2017-07-21 14:32:49 +02:00 |
|
Charles Papon
|
575a410786
|
Avalon regression (WIP)
|
2017-07-20 14:20:19 +02:00 |
|
Charles Papon
|
570f0e1e3e
|
D$ remove the coupling between the mem.cmd.ready >> victim logic >> cpu halt by using halfPipe => Better practical FMax
|
2017-07-20 14:20:19 +02:00 |
|
Dolu1990
|
950944e040
|
typo fix
|
2017-07-19 18:36:30 +02:00 |
|
Dolu1990
|
8643086fc0
|
Add Briey area and timings into readme
|
2017-07-19 18:34:16 +02:00 |
|
Dolu1990
|
02c9b0be75
|
readme add full no cache
|
2017-07-17 16:52:36 +02:00 |
|
Charles Papon
|
42e546ecd9
|
Add fullNoMmuNoCache config
|
2017-07-17 16:45:06 +02:00 |
|
Dolu1990
|
2b03b8487d
|
Add Small and productive in readme
|
2017-07-17 15:38:52 +02:00 |
|
Charles Papon
|
fcec6cba86
|
revert test changes
|
2017-07-17 15:26:37 +02:00 |
|
Charles Papon
|
617861ee6c
|
Add smallAndProductive
|
2017-07-17 15:25:56 +02:00 |
|
Charles Papon
|
431750cac3
|
readme update TOC
|
2017-07-17 14:22:13 +02:00 |
|
Charles Papon
|
99c3397243
|
readme, better plugin example
|
2017-07-17 14:19:28 +02:00 |
|
Charles Papon
|
84bba3adf0
|
REG1/REG2 refractoring RS1/RS2
Add CustomeInstruction example
|
2017-07-17 14:02:56 +02:00 |
|
Dolu1990
|
708a8f66de
|
typo fixes
|
2017-07-17 14:01:35 +02:00 |
|
Dolu1990
|
a4ac2ca8ce
|
Fix typo
|
2017-07-16 20:41:03 +02:00 |
|
Dolu1990
|
5190ba28e0
|
readme add features
|
2017-07-16 19:06:05 +02:00 |
|
Dolu1990
|
59e09ce269
|
Exclude TCL from the repo
|
2017-07-16 18:24:28 +02:00 |
|
Dolu1990
|
a38b137db2
|
readme ToC fix
|
2017-07-16 18:10:03 +02:00 |
|
Dolu1990
|
cd2fb402c1
|
readme ToC fix
|
2017-07-16 18:08:39 +02:00 |
|
Dolu1990
|
3134725aa9
|
readme ToC fix
|
2017-07-16 18:06:45 +02:00 |
|
Dolu1990
|
43ac85aaf6
|
Readme add index and demonstrator
|
2017-07-16 17:47:32 +02:00 |
|
Dolu1990
|
8635054b38
|
cleaning
|
2017-07-16 14:42:24 +02:00 |
|
Dolu1990
|
79c2972076
|
Update bench config with realistic embedded CSR
|
2017-07-16 14:34:42 +02:00 |
|
Dolu1990
|
53300c4116
|
Add area and FMax in readme
Add Synthesis bench
|
2017-07-16 13:50:19 +02:00 |
|
Dolu1990
|
37ea699c55
|
Add Synthesis bench
|
2017-07-16 03:29:50 +02:00 |
|
Charles Papon
|
6930e76042
|
Remove mepc from smallest CSR config
Better readme
|
2017-07-16 00:44:23 +02:00 |
|
Charles Papon
|
bc792a8655
|
Fix UartRx sim
|
2017-07-15 19:05:34 +02:00 |
|
Charles Papon
|
74becb6633
|
Add VexRiscvAvalon QSysify
|
2017-07-15 09:41:39 +02:00 |
|
Charles Papon
|
12d21a08e8
|
Add DebugPlugin avalon
|
2017-07-14 19:28:22 +02:00 |