This website requires JavaScript.
e1820c7831
platforms/ac701: indent HPC.
2020-05-05 09:49:59 +0200
2129b67779
platforms: make sure all plarforms have separators.
2020-05-05 09:47:55 +0200
ea0eda9f75
platforms: make sure all Xilinx/Altera platforms have a create_programmer method, use OpenOCD on Spartan6 and 7-Series.
2020-05-05 09:42:34 +0200
588bbac719
add prog directory with some Xilinx OpenOCD configurations files.
2020-05-05 09:02:58 +0200
78b5727774
targets: rename usb_cdc to usb_acm.
2020-04-30 21:48:10 +0200
088cceca8b
Add Alveo U250 platform and target
2020-04-28 10:50:00 +0100
0ba8045789
Added spiflash1x pins, a method to create an SpiFlash instance and a note on a second UART channel of FT2232H
2020-04-28 21:56:33 +0200
2213d73b89
targets/kcu105: use cmd_latency=1.
2020-04-25 12:13:49 +0200
a8a42c55c9
targets/kc705: manual DDRPHY_CMD_DELAY adjustment no longer needed.
2020-04-25 11:08:05 +0200
865b01ec75
ecpix5: add ethernet.
2020-04-22 20:21:59 +0200
6fe4c4ea62
ecpix5: add DDR3 (working)
2020-04-22 17:03:22 +0200
efb13bc118
add mininal ECPIX-5 board support (Clk/Rst/Leds/UART), BIOS working.
2020-04-22 16:31:07 +0200
4154bdf034
targets/PCIe: add PCIe software reset.
2020-04-20 12:30:09 +0200
4ad6042e07
platforms/de0nano: swap serial tx/rx to ease use of cheap FT232 based cables.
2020-04-18 11:36:11 +0200
4185a019f5
targets: manual define of the SDRAM PHY is no longer needed.
2020-04-16 11:25:59 +0200
cb95962850
targets/ulx3s and colorlight_5a_75b: cleanup USB ACM addition and only keep USB ACM changes.
2020-04-14 16:14:18 +0200
4b4f2f9eb8
Merge pull request #67 from mubes/ecp5_usb
2020-04-14 15:56:22 +0200
f79a010a29
Addition of flash for colorlight board
2020-04-14 14:37:56 +0100
389e8aa13a
Addition of USB ACM for ECP5
2020-04-14 13:53:46 +0100
a12faae0fb
targets/colorlight_5a_75b: increase sys_ps phase (fixes memtest).
2020-04-14 11:24:16 +0200
52c9648176
arty_s7: fix copyrights, rename to arty_s7, various minor changes to make it similar to others targets.
2020-04-13 15:20:36 +0200
0cee59c48f
Merge pull request #65 from Fatsie/artys7
2020-04-13 15:06:29 +0200
bbb1ded9f8
Added Arty S7 board
2020-04-12 21:20:22 +0200
188d4a45d6
targets: use DDROutput on sdram_clock and similar configuration for all SDRAM targets.
2020-04-10 11:46:23 +0200
ca197af2be
targets/simple: use CRG from litex.build.
2020-04-10 10:26:19 +0200
b8a648d499
litex.build: update from migen.genlib.io litex.build.io.
2020-04-10 09:23:33 +0200
4d7135f167
platforms/versa_ecp5: remove LatticeProgrammer (no longer used since we can now use OpenOCD).
2020-04-09 23:06:57 +0200
2cf3c3e845
platforms: cosmetic cleanups.
2020-04-09 20:02:02 +0200
df5de8816d
platforms/ulx3s: cleanup, fix user_leds, add PULLMODE/DRIVE constraints on SDRAM.
2020-04-09 18:53:06 +0200
467b14a0ad
colorlight_5a_75b: minor comment changes.
2020-04-09 08:14:17 +0200
7157b40718
Merge pull request #64 from david-sawatzke/improve_colorlight_v6.1
2020-04-09 08:05:23 +0200
15a27d40fa
targets/colorlight_5a_75b: Change baudrate to work on v6.1
2020-04-09 05:08:23 +0200
4fc9df8414
colorlight_5a_75b/v6.1: Add eth_clock & serial pins
2020-04-09 05:06:08 +0200
4ddde31429
colorlight_5a_75b/v6.1: Fix bank activate pin
2020-04-09 05:05:29 +0200
a80737e8b4
test/test_targets: fix typo.
2020-04-08 09:59:58 +0200
9b3f16af1e
Merge pull request #62 from ilya-epifanov/ecp5-evn-button1-and-spi-flash-ios
2020-04-08 09:00:12 +0200
db67dff0ea
targets/de10lite: use Max10PLL, remove 50MHz limitation.
2020-04-08 08:55:30 +0200
9fe982150c
test/test_targets: add c10lprefkit.
2020-04-08 08:35:33 +0200
8ccab03358
targets/c10lprefkit: use Cyclone10LPPLL, remove 50MHz limitation.
2020-04-08 08:34:59 +0200
4cdc121327
targets/de10nano: use CycloneVPLL, remove 50MHz limitation.
2020-04-08 08:11:04 +0200
2d8a4ef9ec
targets/de1_soc: use CycloneVPLL, remove 50MHz limitation.
2020-04-08 08:07:37 +0200
cec4cbb6dc
targets/de2_115: use CycloneIVPLL, remove 50MHz limitation.
2020-04-08 08:03:41 +0200
1fac6077fb
targets/de0nano: use CycloneIVPLL, remove 50MHz limitation.
2020-04-07 17:01:58 +0200
5f629c203b
targets/vcu118: fix clk500 typo.
2020-04-07 13:47:44 +0200
97cf44763d
targets/trellisboard: add '--with-sdcard' build option
2020-03-19 22:20:41 -0400
68ee91898a
targets/vcu118: fix clk500 typo.
2020-04-07 13:47:44 +0200
d7b9212044
.travis.yml: fix git clone error.
2020-04-07 12:22:02 +0200
5e1da47cc4
setup.py: simplify, switch to Python3.6+ (using python_requires), remove version.
2020-04-07 12:01:45 +0200
a7fbe0a724
colorlight_5a_75b: add SoC with regular UART (on J19).
2020-04-03 10:28:53 +0200
19e5366ad1
targets/colorlight_5a_75b: update sys/sys_ps phases.
2020-03-31 18:18:45 +0200
9ae8a0cc11
colorlight_5a_75b/v7.0: add spiflash pins.
2020-03-31 16:18:12 +0200
a43072ac40
ECP5-EVN board: Added BUTTON_1 and SPI flash pins to IOs
2020-03-28 13:08:46 +0100
ccfc021c1a
Merge pull request #61 from ilya-epifanov/ecp5-evn-programming
2020-03-28 12:59:19 +0100
8afc9a5b03
programming the ECP5-EVN flash through the OpenOCD JTAG-SPI proxy
2020-03-28 11:27:34 +0100
89dd00d3a2
platforms/aller: rename pcie to pcie_x4 (for consistency with others platforms).
2020-03-27 13:01:36 +0100
cc2ac08ab9
Merge pull request #60 from antmicro/zcu104-sodimm
2020-03-26 18:30:27 +0100
d2edf54ab3
zcu104: add fully working SO-DIMM config
2020-03-26 16:37:11 +0100
3b91e96c42
targets/add_constant: avoid specifying value when value is None (=default)
2020-03-26 09:46:29 +0100
555bf6c4dc
targets/Ultrascale(+): enable USDDRPHY_DEBUG.
2020-03-26 09:16:33 +0100
4053c02d7e
targets/orangecrab: add USB PLL for USB CDC with ValentyUSB.
2020-03-25 19:38:36 +0100
85f38876c2
targets: update PCIe on Numato targets.
2020-03-25 11:53:21 +0100
6e6b6dac55
platforms/orangecrab: add spisdcard pins.
2020-03-25 10:21:57 +0100
87fd4dc059
platforms/minispartan6: add spisdcard pins.
2020-03-25 09:53:04 +0100
24033e331c
targets: update SDRAM to use new GENSDRPHY and new ECP5PLL phase support.
2020-03-24 19:59:42 +0100
92f793f9c5
platforms: remove versa_ecp3 (ECP3 no longer supported).
2020-03-24 19:58:12 +0100
131733a2e6
Merge pull request #59 from gregdavill/OrangeCrab
2020-03-23 07:17:56 +0100
fe2fa097fa
test_targets: revert orangecrab test build
2020-03-23 09:20:41 +1030
eb35ec92ba
orangecrab: combine revisions in target
2020-03-23 09:20:01 +1030
357aeac59d
test_targets: Update orangecrab platforms
2020-03-22 21:25:39 +1030
159360da2c
orangecrab: Add r0.2 support
2020-03-22 21:04:07 +1030
bf3c9dc9bf
orangecrab: Add sdram selection option
2020-03-22 20:41:12 +1030
88d3f1d63e
orangecrab: r0.1 OrangeCrab fixes
2020-03-22 20:14:29 +1030
78224b1e56
targets/colorlight_5a_75b: add SDRAM.
2020-03-21 22:11:47 +0100
a95a4eed3f
targets/colorlight_5a_75b: switch to add_ethernet/add_etherbone methods.
2020-03-21 21:50:05 +0100
7bba5caab0
targets/c10prefkit: remove keep attributes (no longer needed, added automatically).
2020-03-21 21:44:44 +0100
6c31933e89
targets: switch to add_etherbone method.
2020-03-21 21:40:45 +0100
159386e3d3
targets: always use sys_clk_freq on SDRAM modules.
2020-03-21 20:00:56 +0100
3fb3ba18e8
targets: switch to add_ethernet method instead of EthernetSoC.
2020-03-21 18:29:52 +0100
83e6fb29f8
targets: switch to SoCCore/add_sdram instead of SoCSDRAM.
2020-03-21 12:43:39 +0100
33bf1d3ee2
Merge pull request #58 from gsomlo/gls-trellisboard-spisdcard
2020-03-20 19:07:00 +0100
fb1cab857a
targets/arty: use new ISERDESE2 MEMORY mode.
2020-03-20 18:59:17 +0100
f021c1de5f
targets/trellisboard: add '--with-spi-sdcard' build option
2020-03-19 22:14:54 -0400
69a78c8c66
targets/trellisboard: switch to SoCCore, use add_ethernet() method
2020-03-18 15:06:38 -0400
396b0383c8
platforms/trellisboard: fix "sdcard" pads, add "spisdcard" pads
2020-03-19 09:53:09 -0400
d0d047dfa4
platforms/ulx3s: add spisdcard pins.
2020-03-19 15:14:05 +0100
6ab13a0661
de10nano/MiSTer: rename SPI SD CARD pins to spisdcard and remove SPI SD Card integration from target.
2020-03-19 11:09:48 +0100
db9d5489ec
Merge pull request #56 from rob-ng15/master
2020-03-19 11:07:40 +0100
57bcadb5b4
platforms/nexys4ddr: add spisdcard pins.
2020-03-19 11:04:11 +0100
f3d7f5880f
platforms/kcu105: fix pcie tx0 p/n swap.
2020-03-18 19:09:52 +0100
bc6ef0bc48
Allow access to secondary sd card via hardware spi bitbanging
2020-03-18 12:13:37 +0000
a6f80694cb
Add in support for secondary sd card via spi hardware bitbanging
2020-03-18 12:11:57 +0000
a99d258411
targets/icebreaker: use simplified version closer to the others targets.
2020-03-13 09:43:43 +0100
74a5ffb9ef
targets/Ultrascale+: use 500MHz IDELAYCTRL reference clock.
2020-03-10 16:58:30 +0100
e2a66090ee
targets/Ultrascale(+): simplify CRG using USIDELAYCTRL.
2020-03-10 16:55:22 +0100
cf58550bba
targets/Ultrascale+: use USPDDRPHY.
2020-03-10 16:05:59 +0100
ce922613a7
Merge pull request #55 from antmicro/jboc/mercury-xu5
2020-03-10 15:30:12 +0100
90de99eb46
platforms/mercury_xu5: fix sdram timing issues
2020-03-10 14:38:15 +0100
75286f8a9b
platforms/zcu104: add missing INTERNAL_VREF on bank 64 (DQ0-31)
2020-03-10 14:57:39 +0100
95e1a05bf1
platforms/Ultrascale: avoid unnecessary {{}} on INTERNAL_VREF.
2020-03-09 09:29:09 +0100
3f191c8561
mercury_xu5: set INTERNAL_VREF to 0.84. (similar to others Ultrascale boards with DDR4).
2020-03-09 09:28:25 +0100
Florent Kermarrec
David Shah
Ilya Epifanov
Dave Marples
Staf Verhaegen
David Sawatzke
Gabriel Somlo
Piotr Binkowski
Greg Davill
rob-ng15
Jędrzej Boczar