154ad54a8e
platforms/kc705: fix imports
2015-03-03 02:03:14 +00:00
a56fce045b
Merge branch 'master' of http://github.com/m-labs/migen
2015-03-02 23:24:48 +01:00
29c5bb8bcd
mibuild/sim/verilator: remove verilator_root, use -Wno-fatal and add verbose option (verbose disabled by default)
2015-03-02 23:23:23 +01:00
36f4b68dd8
mibuild/sim: style fixes
2015-03-02 21:56:20 +00:00
382ca374c3
mibuild: initial Verilator support
2015-03-01 18:27:46 +01:00
961b4bfb4c
platforms/pipistrello: remove unconnected SDRAM pins
2015-02-28 16:20:44 -07:00
03431ece9f
pipistrello: fix ddram dqs, cleanup constraints, add pullup/downs
2015-02-28 16:16:47 -07:00
75290aa0f3
pipistrello: switch back to xc3sprog and fast (papilio) speed
2015-02-28 16:16:47 -07:00
eb8ba145de
kx705: add programmer parameter
2015-02-28 23:34:57 +01:00
b53e2b0d6e
fix xilinx/programmer with Vivado
2015-02-28 19:33:20 +01:00
87d8ff2de7
xilinx/programmer: add source of vivado's settings (need to be tested on a linux machine)
2015-02-28 03:38:47 +01:00
54a8a52e90
xilinx/programmer: add partial flash_bitstream for vivado (can flash full bitstream, need to be adapted to flash part of the flash (bios, ...))
2015-02-27 09:05:23 +01:00
2b0937153d
xilinx/programmer: fix xc3sprog (GenericProgrammer)
2015-02-26 21:36:15 -07:00
8de5b947bd
pipistrello: use fpgaprog
2015-02-26 21:34:02 -07:00
ca52aa5b8c
add fpgaprog programmer
2015-02-26 21:33:49 -07:00
5b5d2d15b8
add pipistrello platform
2015-02-26 21:33:42 -07:00
ba26a400e3
Merge branch 'master' of https://github.com/m-labs/migen
2015-02-26 21:32:39 -07:00
28c219ebd2
platforms/kc705: add user SMA clock
2015-02-26 16:22:22 -07:00
dbdb263acc
mibuild/kc705: add missing pins on FMC LPC
2015-02-26 15:54:41 -07:00
8da1faf310
mibuild: move identifier to platforms
2015-02-26 19:00:43 +01:00
e6a21b2305
mibuild: fix missing xilinx_common -->xilinx.common change
2015-02-26 14:04:36 +01:00
bd5ed0977b
platforms: add default_clk_freq/default_clk_name (to use it on simple designs to test MiSOC on various platforms)
2015-02-26 12:51:57 +01:00
e27a94e7fc
mibuild: add VivadoProgrammer (only load_bitstream)
2015-02-26 12:31:19 +01:00
b3faf5f0da
mibuild: better file organization (create directory for each vendor and move programmers in it)
2015-02-26 12:25:59 +01:00
5bb1c789aa
mibuild/kc705: add FMC connectors
2015-02-18 08:32:45 -07:00
cea1551ae0
mibuild: support pin names in IO extensions
2015-02-18 08:32:31 -07:00
d51d33af73
mibuild: make resolve_signals public
2015-02-14 03:05:07 -08:00
beef7425ce
mibuild: return verilog namespace with build
2015-02-14 03:02:47 -08:00
6fca1dd4dc
mibuild/xilinx_vivado: fix list aliasing problem
2014-12-21 17:37:11 +08:00
8576b91290
xilinx_vivado: add parameters to pass specific commands (to be declared in platforms)
2014-12-21 17:35:42 +08:00
b87ad1af63
xilinx_vivado: use REM for comment on Windows
2014-11-20 15:27:14 -08:00
dff3a17711
mibuild/programmer: add migen folders to flash proxy search dirs
2014-11-05 23:23:22 +08:00
648ab8fa7a
kc705: add Ethernet pins
2014-11-01 21:11:47 +08:00
c0c04a1878
xilinx_vivado: use .bat on Windows platforms (otherwise Vivado uses Unix scripts...)
2014-11-01 20:59:19 +08:00
51f699758c
xilinx_vivado: add hierarchical utilization report
2014-11-01 20:57:54 +08:00
dbaeaf7833
remove trailing whitespaces
2014-10-17 17:08:46 +08:00
4328122a9c
vivado: add more reporting
2014-09-04 15:25:34 +08:00
7c19e43444
vivado: mode batch to prevent vivado from opening tcl shell on error
2014-09-04 15:25:34 +08:00
f21e05025d
platforms/kc705: use jtaghs1_fast cable
2014-09-03 17:29:26 +08:00
644fa8ec55
kc705: enable DCI termination on DDR3
2014-09-02 10:54:38 +08:00
402c7db63c
platforms/kc705: read the configuration flash faster (ISE only)
2014-08-22 18:44:10 +08:00
cb5894b33c
platforms: add -w option to bitgen_opt
2014-08-22 18:26:25 +08:00
7f4e51253e
kc705: add spiflash pins
2014-08-22 10:32:58 +08:00
c19d134978
vivado: enable bitstream compression (optional)
2014-08-21 20:22:08 +08:00
7e77254c57
vivado: make tcl a list of commands, add reporting
2014-08-18 11:01:56 +08:00
c61f96588a
mibuild/programmer: remove unneeded needs_flash_proxy attr
2014-08-09 14:28:15 +08:00
54c63275e0
platforms/kc705: remove DDR3 multirank pins
2014-08-09 10:56:59 +08:00
5fb221e7d9
typo
2014-08-06 23:58:09 +08:00
7ebf08db5e
mibuild/xilinx: connect CE on reset synchronizer FFs
2014-08-06 23:51:50 +08:00
b124a98d92
genlib: add reset synchronizer
2014-08-06 19:38:37 +08:00
4d382328d5
mibuild/xilinx: share more code between ISE and Vivado, use special overrides with Vivado, merge xilinx_tools into xilinx_common
2014-08-06 19:26:00 +08:00
8a7afff30a
platforms/kc705: fix speed grade
2014-08-03 17:51:44 +08:00
8adf6027e1
platforms/kc705: add automatic clk200 constraint
2014-08-03 15:53:58 +08:00
40dcc8b2aa
platforms/kc705: use XC3SProg
2014-08-03 15:53:42 +08:00
210cb720c1
platforms/kc705: use Vivado by default
2014-08-03 15:53:21 +08:00
536a220679
mibuild/programmer: fix XC3SProg init
2014-08-03 15:52:34 +08:00
a0d0742664
mibuild/generic_platform: add recursive parameter to add_source_dir
2014-08-02 21:25:51 +08:00
82068267db
mibuild: move programmer to mibuild and create programmer directly in platforms
2014-08-01 08:03:36 +08:00
244ee52381
kc705/ddram: use lighter pin syntax
2014-07-30 10:31:26 +08:00
9cf204598a
mibuild/xilinx_vivado: allow sharing Misc constraints with ISE: example: ISE: DIFF_TERM=True VIVADO: set property DIFF_TERM TRUE
2014-07-30 10:10:41 +08:00
84eb146e0a
kc705: add ddram pins
2014-07-28 21:35:18 -06:00
fe1c4535d0
mibuild.xilinx_vivado: support settingsXX.sh
...
* in the process refactor the version search, the architecture bit width
detection, the settings search and all also for xilinx_ise
* use distutils.version.StrictVersion
2014-07-27 19:50:15 -06:00
a53feba8a1
mibuild/platforms: add APF27 and APF51 Armadeus platforms
2014-07-11 11:07:54 -06:00
f45897c97f
mibuild/generic_platform.py: adding ability to use void pins (none fpga pin) for connectors
...
Signed-off-by: Fabien Marteau <fabien.marteau@armadeus.com>
2014-07-09 10:41:51 +02:00
f6dfabf7a9
mibuild/xilinx_vivado.py: add set property to misc constraint
2014-06-28 16:15:07 +02:00
7ad1028f8b
mibuild: use SimpleCRG instead of CRG_SE, remove period parameter for CRG_DS, clean up platforms
2014-06-20 17:29:29 +02:00
26717a49fe
kc705: use string default arg
2014-06-07 13:41:46 +02:00
be0d86f57f
initial Vivado support
2014-06-07 12:24:28 +02:00
518a6822d9
mibuild/platforms: use add_period_constraint
2014-05-21 21:02:06 +02:00
a1a57fd962
mibuild: expose add_period_constraint (easier to use for simple designs than vendor specific code)
2014-05-21 21:02:06 +02:00
6c78e6f729
mibuild/altera_quartus: use default gui command line parameters (enable pll constraints propagation) and remove deprecated methods
2014-05-21 21:02:06 +02:00
e9db646134
mibuild: remove useless 'reduce_control_sets auto'
2014-05-12 19:11:11 +02:00
65e8b2742a
de0nano: call sdram mask dm, not dqm (follow other platforms and gensdrphy)
2014-04-25 10:40:26 +02:00
8c03cb0491
mibuild: force shell script generation to unix format (will be executed with cygwin's bash on windows)
2014-04-17 19:43:56 +02:00
d1a96bc49f
mibuild/altera_quartus: enforce use of SystemVerilog in Quartus (Verilog does not support global parameters)
2014-04-17 19:43:24 +02:00
fef08e8c70
mibuild: add bitstream_ext parameter to platforms
2014-04-11 23:28:39 +02:00
82e4980f5c
mibuild/altera_quartus: set top_level_entity
2014-04-11 23:27:04 +02:00
600ce55f91
mibuild/altera_quartus: add support for verilog include
2014-04-11 23:24:51 +02:00
e94f30f15d
mibuild/xilinx_ise: move overwrite option to default options
2014-04-05 12:15:15 +02:00
9ff6cc8403
mibuild/xilinx: make par and map options configurable
2014-04-05 12:15:14 +02:00
bf6ab2b4f6
mibuild/generic_platform: fix default value for connectors
2014-02-17 17:40:15 +01:00
c98b9ecbcb
mibuild/platforms/papilio_pro: add expansion connectors
2014-02-16 23:54:11 +01:00
cb2c9f9f7a
mibuild: support for expansion connectors
2014-02-16 23:53:50 +01:00
4e9dc297fd
platforms/rhino: add GPMC wait pin
2013-12-14 14:32:34 +01:00
3196462311
add support for Verilog include paths
2013-12-12 23:17:51 +01:00
fe0263bb9a
mibuild/xilinx_ise: use ngdbuild_opt also for xst case
2013-12-06 12:15:22 +01:00
0aa6329edb
mibuild/xilinx_ise: add support for custom tools and options
2013-12-06 09:16:07 +01:00
e09e85ec8e
usrp_b100 platform
2013-12-03 22:51:52 +01:00
5447eb51ba
add zedboard platform
2013-12-03 22:51:52 +01:00
bfdc14fbc3
add initial ztex_115d platform
2013-12-03 22:51:52 +01:00
8d093a4a08
lx9 fixups
2013-12-03 22:51:52 +01:00
de830dc743
mibuild: use keyword arguments directly in build_cmdline
2013-12-01 17:56:07 +01:00
80be6acfd1
mibuild: add support for Yosys
2013-12-01 17:07:48 +01:00
6140fd2594
platforms/papilio_pro: add 2x SPI pins
2013-11-25 15:14:58 +01:00
6e48682a5e
platforms/papilio_pro: fix clock signal handling
2013-11-24 23:42:31 +01:00
c514fdc4a3
platforms/m1: use definition compatible with Mixxeo for VGA out
2013-11-24 14:00:22 +01:00
8efd9d11dc
remove stale .gitignore
2013-11-23 15:16:27 +01:00
be3b603b17
merge Mibuild into Migen
2013-11-23 10:45:15 +01:00
62ec66bc00
Add 'mibuild/' from commit '9d5931c969810a236de2a2713cfd5e509839d097'
...
git-subtree-dir: mibuild
git-subtree-mainline: 7e4024beb39d5931c969
2013-11-23 10:34:28 +01:00
9d5931c969
platforms/mixxeo: update DVI input timing constraints
2013-11-19 23:15:42 +01:00
Sebastien Bourdeauducq
Florent Kermarrec
Robert Jordens
Yann Sionneau
Fabien Marteau
Sebastien Bourdeauducq